superio/ite/it8721f: Rewrite from hardcoded base addr
Rewrite early_serial.c implementation to honour a passed base address in device_t, removing any hard coding of values. We also expose early sio init functions as romstage symbols to avoid falsely #including "early_serial.c" in romstage.c of board support. Change-Id: I521b8f7cf85173345b90745c6f2ab66e25429f5d Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/5561 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
This commit is contained in:
Edward O'Callaghan
Patrick Georgi
parent
392de45ae2
commit
03ad2a26b0
|
|
@ -41,7 +41,7 @@
|
|||
#include "northbridge/amd/amdfam10/reset_test.c"
|
||||
#include <console/loglevel.h>
|
||||
#include "cpu/x86/bist.h"
|
||||
#include "superio/ite/it8721f/early_serial.c"
|
||||
#include <superio/ite/it8721f/it8721f.h>
|
||||
#include <cpu/amd/mtrr.h>
|
||||
#include "northbridge/amd/amdfam10/setup_resource_map.c"
|
||||
#include "southbridge/amd/rs780/early_setup.c"
|
||||
|
|
|
|||
|
|
@ -18,5 +18,5 @@
|
|||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
romstage-$(CONFIG_SUPERIO_ITE_IT8721F) += early_serial.c
|
||||
ramstage-$(CONFIG_SUPERIO_ITE_IT8721F) += superio.c
|
||||
|
||||
|
|
|
|||
|
|
@ -21,11 +21,10 @@
|
|||
#ifndef SUPERIO_ITE_IT8721F_CHIP_H
|
||||
#define SUPERIO_ITE_IT8721F_CHIP_H
|
||||
|
||||
#include <device/device.h>
|
||||
#include <pc80/keyboard.h>
|
||||
|
||||
struct superio_ite_it8721f_config {
|
||||
struct pc_keyboard keyboard;
|
||||
};
|
||||
|
||||
#endif
|
||||
#endif /* SUPERIO_ITE_IT8721F_CHIP_H */
|
||||
|
|
|
|||
|
|
@ -3,6 +3,7 @@
|
|||
*
|
||||
* Copyright (C) 2006 Uwe Hermann <uwe@hermann-uwe.de>
|
||||
* Copyright (C) 2011 QingPei Wang <wangqingpei@gmail.com>
|
||||
* Copyright (C) 2014 Edward O'Callaghan <eocallaghan@alterapraxis.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
|
|
@ -20,30 +21,25 @@
|
|||
*/
|
||||
|
||||
#include <arch/io.h>
|
||||
#include <device/pnp.h>
|
||||
#include <stdint.h>
|
||||
#include "it8721f.h"
|
||||
|
||||
/* The base address is 0x2e or 0x4e, depending on config bytes. */
|
||||
#define SIO_BASE 0x2e
|
||||
#define SIO_INDEX SIO_BASE
|
||||
#define SIO_DATA (SIO_BASE + 1)
|
||||
|
||||
/* Global configuration registers. */
|
||||
#define IT8721F_CONFIG_REG_CC 0x02 /* Configure Control (write-only). */
|
||||
#define IT8721F_CONFIG_REG_LDN 0x07 /* Logical Device Number. */
|
||||
#define IT8721F_CONFIG_REG_CLOCKSEL 0x23 /* Clock Selection. */
|
||||
#define IT8721F_CONFIG_REG_SWSUSP 0x24 /* Software Suspend, Flash I/F. */
|
||||
|
||||
static void it8721f_sio_write(u8 ldn, u8 index, u8 value)
|
||||
static void it8721f_sio_write(device_t dev, u8 index, u8 value)
|
||||
{
|
||||
outb(IT8721F_CONFIG_REG_LDN, SIO_BASE);
|
||||
outb(ldn, SIO_DATA);
|
||||
outb(index, SIO_BASE);
|
||||
outb(value, SIO_DATA);
|
||||
pnp_set_logical_device(dev);
|
||||
pnp_write_config(dev, index, value);
|
||||
}
|
||||
|
||||
static void it8721f_enter_conf(void)
|
||||
static void it8721f_enter_conf(device_t dev)
|
||||
{
|
||||
u16 port = 0x2e; /* TODO: Don't hardcode! */
|
||||
u16 port = dev >> 8;
|
||||
|
||||
outb(0x87, port);
|
||||
outb(0x01, port);
|
||||
|
|
@ -51,43 +47,39 @@ static void it8721f_enter_conf(void)
|
|||
outb((port == 0x4e) ? 0xaa : 0x55, port);
|
||||
}
|
||||
|
||||
static void it8721f_exit_conf(void)
|
||||
static void it8721f_exit_conf(device_t dev)
|
||||
{
|
||||
it8721f_sio_write(0x00, IT8721F_CONFIG_REG_CC, 0x02);
|
||||
it8721f_sio_write(dev, IT8721F_CONFIG_REG_CC, 0x02);
|
||||
}
|
||||
|
||||
/* Select 24MHz CLKIN (48MHz default). */
|
||||
void it8721f_24mhz_clkin(void)
|
||||
static void it8721f_reg_write(device_t dev, u8 index, u8 value)
|
||||
{
|
||||
it8721f_enter_conf();
|
||||
it8721f_sio_write(0x00, IT8721F_CONFIG_REG_CLOCKSEL, 0x1);
|
||||
it8721f_exit_conf();
|
||||
it8721f_enter_conf(dev);
|
||||
it8721f_sio_write(dev, index, value);
|
||||
it8721f_exit_conf(dev);
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* in romstage.c
|
||||
* #define CLKIN_DEV PNP_DEV(0x2e, IT8721F_GPIO)
|
||||
* and pass: CLKIN_DEV
|
||||
* IT8721F_UART_CLK_PREDIVIDE_24
|
||||
* IT8721F_UART_CLK_PREDIVIDE_48 (default)
|
||||
*/
|
||||
void it8721f_conf_clkin(device_t dev, u8 predivide)
|
||||
{
|
||||
it8721f_reg_write(dev, IT8721F_CONFIG_REG_CLOCKSEL, (0x1 & predivide));
|
||||
}
|
||||
|
||||
|
||||
/* Enable the serial port(s). */
|
||||
void it8721f_enable_serial(device_t dev, u16 iobase)
|
||||
{
|
||||
/* (1) Enter the configuration state (MB PnP mode). */
|
||||
it8721f_enter_conf();
|
||||
|
||||
/* (2) Modify the data of configuration registers. */
|
||||
|
||||
/*
|
||||
* Select the chip to configure (if there's more than one).
|
||||
* Set bit 7 to select JP3=1, clear bit 7 to select JP3=0.
|
||||
* If this register is not written, both chips are configured.
|
||||
*/
|
||||
|
||||
/* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_CONFIGSEL, 0x00); */
|
||||
|
||||
/* Enable serial port(s). */
|
||||
it8721f_sio_write(IT8721F_SP1, 0x30, 0x1); /* Serial port 1 */
|
||||
it8721f_sio_write(IT8721F_SP2, 0x30, 0x1); /* Serial port 2 */
|
||||
|
||||
/* Clear software suspend mode (clear bit 0). TODO: Needed? */
|
||||
/* it8718f_sio_write(0x00, IT8718F_CONFIG_REG_SWSUSP, 0x00); */
|
||||
|
||||
/* (3) Exit the configuration state (MB PnP mode). */
|
||||
it8721f_exit_conf();
|
||||
it8721f_enter_conf(dev);
|
||||
pnp_set_logical_device(dev);
|
||||
pnp_set_enable(dev, 0);
|
||||
pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
|
||||
pnp_set_enable(dev, 1);
|
||||
it8721f_exit_conf(dev);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,9 +19,13 @@
|
|||
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
*/
|
||||
|
||||
#ifndef SUPERIO_ITE_IT8721F_IT8721F_H
|
||||
#define SUPERIO_ITE_IT8721F_IT8721F_H
|
||||
#ifndef SUPERIO_ITE_IT8721F_H
|
||||
#define SUPERIO_ITE_IT8721F_H
|
||||
|
||||
#include <device/pnp.h>
|
||||
#include <stdint.h>
|
||||
|
||||
/* Logical Device Numbers (LDN). */
|
||||
#define IT8721F_FDC 0x00 /* Floppy */
|
||||
#define IT8721F_SP1 0x01 /* Com1 */
|
||||
#define IT8721F_SP2 0x02 /* Com2 */
|
||||
|
|
@ -32,10 +36,10 @@
|
|||
#define IT8721F_GPIO 0x07 /* GPIO */
|
||||
#define IT8721F_IR 0x0a /* Consumer IR */
|
||||
|
||||
#if defined(__PRE_RAM__)
|
||||
void it8721f_24mhz_clkin(void);
|
||||
void it8721f_disable_reboot(void);
|
||||
void it8721f_enable_serial(device_t dev, u16 iobase);
|
||||
#endif
|
||||
#define IT8721F_UART_CLK_PREDIVIDE_48 0x00 /* default */
|
||||
#define IT8721F_UART_CLK_PREDIVIDE_24 0x01
|
||||
|
||||
#endif
|
||||
void it8721f_conf_clkin(device_t dev, u8 predivide);
|
||||
void it8721f_enable_serial(device_t dev, u16 iobase);
|
||||
|
||||
#endif /* SUPERIO_ITE_IT8721F_H */
|
||||
|
|
|
|||
|
|
@ -67,8 +67,7 @@ static struct pnp_info pnp_dev_info[] = {
|
|||
|
||||
static void enable_dev(struct device *dev)
|
||||
{
|
||||
pnp_enable_devices(dev, &pnp_ops,
|
||||
ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
|
||||
pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
|
||||
}
|
||||
|
||||
struct chip_operations superio_ite_it8721f_ops = {
|
||||
|
|
|
|||
Loading…
Reference in New Issue