cardbus_scan_bridge is identical to pci_scan_bridge
(since PCI_PRIMARY_BUS == PCI_CB_PRIMARY_BUS.) Remove it. Fix a typo while there. Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -41,9 +41,9 @@ static void cardbus_record_bridge_resource(
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device_t dev, resource_t moving, resource_t min_size,
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unsigned index, unsigned long type)
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{
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/* Initiliaze the constraints on the current bus */
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/* Initialize the constraints on the current bus. */
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struct resource *resource;
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resource = 0;
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resource = NULL;
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if (moving) {
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unsigned long gran;
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resource_t step;
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@ -51,7 +51,7 @@ static void cardbus_record_bridge_resource(
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resource->size = 0;
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gran = 0;
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step = 1;
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while((moving & step) == 0) {
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while ((moving & step) == 0) {
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gran += 1;
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step <<= 1;
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}
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@ -174,78 +174,12 @@ void cardbus_enable_resources(device_t dev)
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enable_childrens_resources(dev);
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}
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unsigned int cardbus_scan_bus(struct bus *bus,
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unsigned min_devfn, unsigned max_devfn,
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unsigned int max)
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{
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return pci_scan_bus(bus, min_devfn, max_devfn, max);
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}
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unsigned int cardbus_scan_bridge(device_t dev, unsigned int max)
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{
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struct bus *bus;
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uint32_t buses;
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uint16_t cr;
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printk(BIOS_SPEW, "%s for %s\n", __func__, dev_path(dev));
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bus = &dev->link[0];
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bus->dev = dev;
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dev->links = 1;
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/* Set up the primary, secondary and subordinate bus numbers. We have
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* no idea how many buses are behind this bridge yet, so we set the
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* subordinate bus number to 0xff for the moment.
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*/
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bus->secondary = ++max;
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bus->subordinate = 0xff;
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/* Clear all status bits and turn off memory, I/O and master enables. */
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cr = pci_read_config16(dev, PCI_COMMAND);
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pci_write_config16(dev, PCI_COMMAND, 0x0000);
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pci_write_config16(dev, PCI_STATUS, 0xffff);
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/*
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* Read the existing primary/secondary/subordinate bus
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* number configuration.
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*/
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buses = pci_read_config32(dev, PCI_CB_PRIMARY_BUS);
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/* Configure the bus numbers for this bridge: the configuration
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* transactions will not be propagated by the bridge if it is not
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* correctly configured.
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*/
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buses &= 0xff000000;
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buses |= (((unsigned int) (dev->bus->secondary) << 0) |
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((unsigned int) (bus->secondary) << 8) |
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((unsigned int) (bus->subordinate) << 16));
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pci_write_config32(dev, PCI_CB_PRIMARY_BUS, buses);
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/* Now we can scan all subordinate buses
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* i.e. the bus behind the bridge.
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*/
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max = cardbus_scan_bus(bus, 0x00, 0xff, max);
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/* We know the number of buses behind this bridge. Set the subordinate
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* bus number to its real value.
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*/
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bus->subordinate = max;
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buses = (buses & 0xff00ffff) |
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((unsigned int) (bus->subordinate) << 16);
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pci_write_config32(dev, PCI_CB_PRIMARY_BUS, buses);
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pci_write_config16(dev, PCI_COMMAND, cr);
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printk(BIOS_SPEW, "%s returns max %d\n", __func__, max);
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return max;
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}
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struct device_operations default_cardbus_ops_bus = {
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.read_resources = cardbus_read_resources,
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.set_resources = pci_dev_set_resources,
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.enable_resources = cardbus_enable_resources,
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.init = 0,
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.scan_bus = cardbus_scan_bridge,
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.scan_bus = pci_scan_bridge,
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.enable = 0,
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.reset_bus = pci_bus_reset,
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};
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