diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 064f71e2f2..85d3edf330 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -441,6 +441,10 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
 		dev->enabled = 0;
 	params->XdciEnable = dev->enabled;
 
+	/* Enable or disable Gaussian Mixture Model in devicetree */
+	dev = pcidev_path_on_root(SA_DEVFN_GMM);
+	params->GmmEnable = dev ? dev->enabled : 0;
+
 	/*
 	 * Send VR specific mailbox commands:
 	 * 000b - no VR specific command sent
diff --git a/src/soc/intel/skylake/include/soc/pci_devs.h b/src/soc/intel/skylake/include/soc/pci_devs.h
index 0e8bb6841f..ff6b8c1c23 100644
--- a/src/soc/intel/skylake/include/soc/pci_devs.h
+++ b/src/soc/intel/skylake/include/soc/pci_devs.h
@@ -42,6 +42,9 @@
 #define  SA_DEVFN_IGD		PCI_DEVFN(SA_DEV_SLOT_IGD, 0)
 #define  SA_DEV_IGD		PCI_DEV(0, SA_DEV_SLOT_IGD, 0)
 
+#define SA_DEV_SLOT_GMM		0x08
+#define  SA_DEVFN_GMM		PCI_DEVFN(SA_DEV_SLOT_GMM, 0)
+#define  SA_DEV_GMM		PCI_DEV(0, SA_DEV_SLOT_GMM, 0)
 /* PCH Devices */
 
 #define PCH_DEV_SLOT_ISH	0x13