Fix AP_CODE_IN_CAR (only selected for two boards), STACK_SIZE, and HEAP_SIZE.

Signed-off-by: Myles Watson <mylesgw@gmail.com>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4793 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Myles Watson 2009-10-16 19:12:49 +00:00
parent 2c54f90280
commit 04000f4642
28 changed files with 5 additions and 112 deletions

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@ -100,7 +100,7 @@ config PCI_ROM_RUN
config HEAP_SIZE
hex
default 0x2000
default 0x4000
config COREBOOT_V2
bool
@ -138,17 +138,8 @@ config RAMTOP
hex
default 0x200000
config COMPRESSED_PAYLOAD_LZMA
bool
default y
config COMPRESSED_PAYLOAD_NRV2B
bool
default n
config ATI_RAGE_XL
bool
default n
source src/console/Kconfig
@ -218,7 +209,6 @@ config IOAPIC
config VIDEO_MB
int
default 0
config USE_WATCHDOG_ON_BOOT
bool
@ -232,7 +222,6 @@ config VGA
config GFXUMA
bool
default n
help
Enable Unified Memory Architecture for graphics.
@ -357,6 +346,9 @@ config COMPRESSED_PAYLOAD_LZMA
In order to reduce the size payloads take up in the ROM chip
coreboot can compress them using the LZMA algorithm.
config COMPRESSED_PAYLOAD_NRV2B
default n
endmenu
menu "VGA BIOS"

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@ -2,7 +2,6 @@
# It is usually set in mainboard/*/Kconfig.
config ARCH_POWERPC
bool
default n
# This is the name of the respective architecture subdirectory in arch/.
config ARCH

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@ -14,7 +14,6 @@ config BOARD_AMD_DBM690T
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select IOAPIC
select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select HAVE_ACPI_TABLES

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@ -13,7 +13,6 @@ config BOARD_AMD_PISTACHIO
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select IOAPIC
select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select HAVE_ACPI_TABLES

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@ -14,7 +14,6 @@ config BOARD_ARIMA_HDAMA
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select IOAPIC
select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select BOARD_ROMSIZE_KB_512

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@ -76,11 +76,6 @@ config MAX_PHYSICAL_CPUS
default 1
depends on BOARD_ASUS_M2V_MX_SE
config STACK_SIZE
hex
default 0x2000
depends on BOARD_ASUS_M2V_MX_SE
config HEAP_SIZE
hex
default 0x40000

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@ -97,11 +97,6 @@ config MAX_PHYSICAL_CPUS
default 1
depends on BOARD_GIGABYTE_GA_2761GXDK
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_GIGABYTE_GA_2761GXDK
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -99,11 +99,6 @@ config MAX_PHYSICAL_CPUS
default 1
depends on BOARD_GIGABYTE_M57SLI
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_GIGABYTE_M57SLI
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -14,7 +14,6 @@ config BOARD_IBM_E325
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select IOAPIC
select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select BOARD_ROMSIZE_KB_512

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@ -14,7 +14,6 @@ config BOARD_IBM_E326
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select IOAPIC
select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select BOARD_ROMSIZE_KB_512

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@ -14,7 +14,6 @@ config BOARD_IWILL_DK8_HTX
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select IOAPIC
select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select HAVE_ACPI_TABLES

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@ -14,7 +14,6 @@ config BOARD_IWILL_DK8S2
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select IOAPIC
select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select ATI_RAGE_XL

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@ -14,7 +14,6 @@ config BOARD_IWILL_DK8X
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select IOAPIC
select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select BOARD_ROMSIZE_KB_512

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@ -11,8 +11,6 @@ config BOARD_MSI_MS7135
select HAVE_MP_TABLE
select USE_DCACHE_RAM
select USE_PRINTK_IN_CAR
select SERIAL_CPU_INIT
select AP_CODE_IN_CAR
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
@ -75,11 +73,6 @@ config MEM_TRAIN_SEQ
default n
depends on BOARD_MSI_MS7135
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_MSI_MS7135
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -98,11 +98,6 @@ config MAX_PHYSICAL_CPUS
default 1
depends on BOARD_MSI_MS7260
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_MSI_MS7260
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -98,11 +98,6 @@ config MAX_PHYSICAL_CPUS
default 1
depends on BOARD_MSI_MS9282
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_MSI_MS9282
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -98,11 +98,6 @@ config MAX_PHYSICAL_CPUS
default 1
depends on BOARD_NVIDIA_L1_2PVV
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_NVIDIA_L1_2PVV
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -12,6 +12,7 @@ config BOARD_SUPERMICRO_H8DME
select USE_PRINTK_IN_CAR
select USE_DCACHE_RAM
select HAVE_HARD_RESET
select AP_CODE_IN_CAR
select IOAPIC
select BOARD_ROMSIZE_KB_1024

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@ -15,7 +15,6 @@ config BOARD_TECHNEXION_TIM8690
select HAVE_HARD_RESET
select IOAPIC
select MEM_TRAIN_SEQ
select AP_CODE_IN_CAR
select SB_HT_CHAIN_UNITID_OFFSET_ONLY
select WAIT_BEFORE_CPUS_INIT
select HAVE_ACPI_TABLES

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@ -10,8 +10,6 @@ config BOARD_TYAN_S2880
select SUPERIO_WINBOND_W83627HF
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select SERIAL_CPU_INIT
select AP_CODE_IN_CAR
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
@ -74,11 +72,6 @@ config MEM_TRAIN_SEQ
default n
depends on BOARD_TYAN_S2880
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_TYAN_S2880
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -10,8 +10,6 @@ config BOARD_TYAN_S2881
select SUPERIO_WINBOND_W83627HF
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select SERIAL_CPU_INIT
select AP_CODE_IN_CAR
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
@ -74,11 +72,6 @@ config MEM_TRAIN_SEQ
default n
depends on BOARD_TYAN_S2881
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_TYAN_S2881
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -10,8 +10,6 @@ config BOARD_TYAN_S2882
select SUPERIO_WINBOND_W83627HF
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select SERIAL_CPU_INIT
select AP_CODE_IN_CAR
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
@ -74,11 +72,6 @@ config MEM_TRAIN_SEQ
default n
depends on BOARD_TYAN_S2882
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_TYAN_S2882
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -10,8 +10,6 @@ config BOARD_TYAN_S2885
select SUPERIO_WINBOND_W83627HF
select HAVE_PIRQ_TABLE
select HAVE_MP_TABLE
select SERIAL_CPU_INIT
select AP_CODE_IN_CAR
select BOARD_ROMSIZE_KB_512
config MAINBOARD_DIR
@ -74,11 +72,6 @@ config MEM_TRAIN_SEQ
default n
depends on BOARD_TYAN_S2885
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_TYAN_S2885
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -75,11 +75,6 @@ config MEM_TRAIN_SEQ
default n
depends on BOARD_TYAN_S2891
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_TYAN_S2891
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -75,11 +75,6 @@ config MEM_TRAIN_SEQ
default n
depends on BOARD_TYAN_S2892
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_TYAN_S2892
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -75,11 +75,6 @@ config MEM_TRAIN_SEQ
default n
depends on BOARD_TYAN_S2895
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_TYAN_S2895
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -98,11 +98,6 @@ config MAX_PHYSICAL_CPUS
default 1
depends on BOARD_TYAN_S2912
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_TYAN_S2912
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n

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@ -97,11 +97,6 @@ config MAX_PHYSICAL_CPUS
default 1
depends on BOARD_TYAN_S2912_FAM10
config AP_CODE_IN_CAR
bool
default n
depends on BOARD_TYAN_S2912_FAM10
config HW_MEM_HOLE_SIZE_AUTO_INC
bool
default n