cpu/intel/model_206{5,a}x: Rework acpi/cpu.asl
Use acpigen_write_processor_cnot to implement notifications to the CPU. Automatically generate \PPKG in SSDT. Change-Id: Iecc54e94484f5f11e0ba8ef6d1d844276e484b4d Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/29886 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Arthur Heymans
Duncan Laurie
parent
c54d14f5b4
commit
04008a9c14
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@ -331,6 +331,13 @@ void generate_cpu_entries(struct device *device)
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acpigen_pop_len();
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}
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}
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/* PPKG is usually used for thermal management
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of the first and only package. */
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acpigen_write_processor_package("PPKG", 0, cores_per_package);
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/* Add a method to notify processor nodes */
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acpigen_write_processor_cnot(cores_per_package);
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}
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struct chip_operations cpu_intel_model_2065x_ops = {
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@ -334,6 +334,13 @@ void generate_cpu_entries(struct device *device)
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acpigen_pop_len();
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}
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}
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/* PPKG is usually used for thermal management
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of the first and only package. */
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acpigen_write_processor_package("PPKG", 0, cores_per_package);
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/* Add a method to notify processor nodes */
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acpigen_write_processor_cnot(cores_per_package);
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}
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struct chip_operations cpu_intel_model_206ax_ops = {
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@ -14,84 +14,23 @@
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* GNU General Public License for more details.
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*/
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/* These devices are created at runtime */
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External (\_PR.CP00, DeviceObj)
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External (\_PR.CP01, DeviceObj)
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External (\_PR.CP02, DeviceObj)
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External (\_PR.CP03, DeviceObj)
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External (\_PR.CP04, DeviceObj)
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External (\_PR.CP05, DeviceObj)
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External (\_PR.CP06, DeviceObj)
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External (\_PR.CP07, DeviceObj)
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/* These come from the dynamically created CPU SSDT */
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External (\_PR.CNOT, MethodObj)
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/* Notify OS to re-read CPU tables, assuming ^2 CPU count */
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/* Notify OS to re-read CPU tables */
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Method (PNOT)
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{
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If (LGreaterEqual (\PCNT, 2)) {
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Notify (\_PR.CP00, 0x81) // _CST
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Notify (\_PR.CP01, 0x81) // _CST
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}
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If (LGreaterEqual (\PCNT, 4)) {
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Notify (\_PR.CP02, 0x81) // _CST
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Notify (\_PR.CP03, 0x81) // _CST
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}
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If (LGreaterEqual (\PCNT, 8)) {
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Notify (\_PR.CP04, 0x81) // _CST
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Notify (\_PR.CP05, 0x81) // _CST
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Notify (\_PR.CP06, 0x81) // _CST
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Notify (\_PR.CP07, 0x81) // _CST
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}
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\_PR.CNOT (0x81)
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}
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/* Notify OS to re-read CPU _PPC limit, assuming ^2 CPU count */
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/* Notify OS to re-read CPU _PPC limit */
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Method (PPCN)
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{
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If (LGreaterEqual (\PCNT, 2)) {
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Notify (\_PR.CP00, 0x80) // _PPC
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Notify (\_PR.CP01, 0x80) // _PPC
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}
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If (LGreaterEqual (\PCNT, 4)) {
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Notify (\_PR.CP02, 0x80) // _PPC
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Notify (\_PR.CP03, 0x80) // _PPC
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}
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If (LGreaterEqual (\PCNT, 8)) {
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Notify (\_PR.CP04, 0x80) // _PPC
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Notify (\_PR.CP05, 0x80) // _PPC
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Notify (\_PR.CP06, 0x80) // _PPC
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Notify (\_PR.CP07, 0x80) // _PPC
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}
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\_PR.CNOT (0x80)
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}
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/* Notify OS to re-read Throttle Limit tables, assuming ^2 CPU count */
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/* Notify OS to re-read Throttle Limit tables */
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Method (TNOT)
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{
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If (LGreaterEqual (\PCNT, 2)) {
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Notify (\_PR.CP00, 0x82) // _TPC
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Notify (\_PR.CP01, 0x82) // _TPC
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}
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If (LGreaterEqual (\PCNT, 4)) {
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Notify (\_PR.CP02, 0x82) // _TPC
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Notify (\_PR.CP03, 0x82) // _TPC
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}
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If (LGreaterEqual (\PCNT, 8)) {
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Notify (\_PR.CP04, 0x82) // _TPC
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Notify (\_PR.CP05, 0x82) // _TPC
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Notify (\_PR.CP06, 0x82) // _TPC
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Notify (\_PR.CP07, 0x82) // _TPC
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}
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}
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/* Return a package containing enabled processor entries */
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Method (PPKG)
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{
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If (LGreaterEqual (\PCNT, 8)) {
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Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03,
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\_PR.CP04, \_PR.CP05, \_PR.CP06, \_PR.CP07})
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} ElseIf (LGreaterEqual (\PCNT, 4)) {
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Return (Package() {\_PR.CP00, \_PR.CP01, \_PR.CP02, \_PR.CP03})
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} ElseIf (LGreaterEqual (\PCNT, 2)) {
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Return (Package() {\_PR.CP00, \_PR.CP01})
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} Else {
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Return (Package() {\_PR.CP00})
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}
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\_PR.CNOT (0x82)
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}
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@ -46,12 +46,9 @@ Scope(\_TZ)
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Name (_TC1, 0x02)
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Name (_TC2, 0x05)
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#if !IS_ENABLED(CONFIG_CPU_INTEL_MODEL_206AX) && \
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!IS_ENABLED(CONFIG_CPU_INTEL_MODEL_2065X) && \
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!IS_ENABLED(CONFIG_CPU_INTEL_MODEL_306AX)
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/* Generated by acpigen */
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/* Generated by acpigen */
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External (\PPKG, MethodObj)
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#endif
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/* Processors used for passive cooling */
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Method (_PSL, 0, Serialized)
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{
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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Scope (\_TZ)
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{
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ThermalZone (THRM)
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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Scope (\_TZ)
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{
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ThermalZone (THRM)
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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Scope (\_TZ)
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{
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ThermalZone (THRM)
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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#define HAVE_THERMALZONE
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Scope (\_TZ)
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{
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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#define HAVE_THERMALZONE
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Scope (\_TZ)
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{
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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#define HAVE_THERMALZONE
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Scope (\_TZ)
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{
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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#define HAVE_THERMALZONE
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Scope (\_TZ)
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{
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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#define HAVE_THERMALZONE
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Scope (\_TZ)
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{
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@ -16,6 +16,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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#define HAVE_THERMALZONE
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Scope (\_TZ)
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{
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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#define HAVE_THERMALZONE
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Scope (\_TZ)
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{
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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#define HAVE_THERMALZONE
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Scope (\_TZ)
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{
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@ -15,6 +15,8 @@
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// Thermal Zone
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External (\PPKG, MethodObj)
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Scope (\_TZ)
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{
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ThermalZone (THRM)
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