southbridge/intel/ibexpeak: transition away from device_t

Replace the use of the old device_t definition inside
southbridge/intel/ibexpeak.

The patch has been tested both with the arch/io.h definition of device_t
enabled and disabled in order to ensure compatibility while the
transaction takes place.

Change-Id: Ic569aada9301b37e73196872584e191d553acd86
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16408
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Antonello Dettori 2016-09-02 09:15:33 +02:00 committed by Martin Roth
parent 061d781e99
commit 040117af52
4 changed files with 4 additions and 4 deletions

View File

@ -23,7 +23,7 @@
void enable_smbus(void)
{
device_t dev;
pci_devfn_t dev;
/* Set the SMBus device statically. */
dev = PCI_DEV(0x0, 0x1f, 0x3);

View File

@ -23,7 +23,7 @@
which is done at the end of raminit. */
void early_thermal_init(void)
{
device_t dev;
pci_devfn_t dev;
msr_t msr;
dev = PCI_DEV(0x0, 0x1f, 0x6);

View File

@ -61,7 +61,7 @@ void intel_pch_finalize_smm(void);
#if !defined(__ASSEMBLER__)
#if !defined(__PRE_RAM__)
#if !defined(__SMM__)
#if !defined(__SIMPLE_DEVICE__)
#include "chip.h"
void pch_enable(device_t dev);
#endif

View File

@ -280,7 +280,7 @@ static void busmaster_disable_on_bus(int bus)
for (slot = 0; slot < 0x20; slot++) {
for (func = 0; func < 8; func++) {
u32 reg32;
device_t dev = PCI_DEV(bus, slot, func);
pci_devfn_t dev = PCI_DEV(bus, slot, func);
val = pci_read_config32(dev, PCI_VENDOR_ID);