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AMD sb800 agesa/hudson: Use PCI defines 

The original lines had contradicting comment and code.
This change follows the code and sets MASTER bit too.

Change-Id: Id2886bfc107612530f0e9747e5d49a9740fb8532
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/3466
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
This commit is contained in:
Kyösti Mälkki 2013-06-14 17:48:20 +03:00 committed by Ronald G. Minnich
parent 00cc7f4355
commit 04372975bd
2 changed files with 4 additions and 2 deletions
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3
src/southbridge/amd/agesa/hudson/enable_usbdebug.c
View File

@ -50,6 +50,7 @@ void enable_usbdebug(unsigned int port)
pci_write_config32(PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2),
EHCI_BAR_INDEX, CONFIG_EHCI_BAR);
pci_write_config8(PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2), 0x04, 0x6); /* mem space enabe */
pci_write_config8(PCI_DEV(0, HUDSON_DEVN_BASE + 0x12, 2),
PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
set_debug_port(port);
}

3
src/southbridge/amd/sb800/enable_usbdebug.c
View File

@ -50,6 +50,7 @@ void enable_usbdebug(unsigned int port)
pci_write_config32(PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2),
EHCI_BAR_INDEX, CONFIG_EHCI_BAR);
pci_write_config8(PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2), 0x04, 0x6); /* mem space enabe */
pci_write_config8(PCI_DEV(0, SB800_DEVN_BASE + 0x12, 2),
PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
set_debug_port(port);
}