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sb/amd/cimx/sb800: Fix 16-bit read/write PCI_COMMAND register 

Change-Id: I779387fb0c9d3ad6e16d4ccfc39c38dfe6620345
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/40806
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Elyes HAOUAS 2020-04-28 19:28:19 +02:00 committed by Patrick Georgi
parent efea70c0ee
commit 04506e2987
1 changed files with 1 additions and 1 deletions
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src/southbridge/amd/cimx/sb800/late.c
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@ -98,7 +98,7 @@ static void ahci_raid_init(struct device *dev)
} }
dev->command |= PCI_COMMAND_MASTER; dev->command |= PCI_COMMAND_MASTER;
pci_write_config8(dev, PCI_COMMAND, dev->command); pci_write_config16(dev, PCI_COMMAND, dev->command);
printk(BIOS_DEBUG, "AHCI/RAID controller initialized\n"); printk(BIOS_DEBUG, "AHCI/RAID controller initialized\n");
} }