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Kconfig: Remove unnecessary and incorrect MRC_CACHE symbols 

Because of a misunderstanding of how Kconfig files are parsed, the
OVERRIDE_MRC_CACHE_LOC symbol was added to make sure that the value
was correctly set.  This is not needed unless for some reason the
Kconfig parser is suddenly rewritten to parse everything differently.

At some point, the value in the FSP's Kconfig file was updated to
OVERRIDE_CACHE_CACHE_LOC, while the entries in the mainboard
Kconfig files were not updated.  This resulted in the default values
not getting set correctly by default on the FSP Bay Trail boards.

This removes the whole bunch of incorrect and unnecessary symbols and
just sets the default for the MRC cache location directly.

Change-Id: I1cec758576866b7e0677272b8309bfde8d4a1ee4
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: http://review.coreboot.org/10611
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Martin Roth 2015-06-19 23:39:38 -06:00
parent 302a2ec7d1
commit 0458370bf7
6 changed files with 4 additions and 32 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
src/drivers/intel/fsp1_0/Kconfig
View File

@ -82,20 +82,8 @@ config MRC_CACHE_SIZE
should be a full sector of the flash ROM chip and nothing else should
be included in CBFS in any sector that the fast boot cache data is in.
config OVERRIDE_CACHE_CACHE_LOC
bool
help
Selected by the platform to set a new default location for the
MRC/fast boot cache.
config MRC_CACHE_LOC_OVERRIDE
hex
help
Sets the override CBFS location of the MRC/fast boot cache.
config MRC_CACHE_LOC
hex "Fast Boot Data Cache location in CBFS"
default MRC_CACHE_LOC_OVERRIDE if OVERRIDE_CACHE_CACHE_LOC
default 0xfff50000
depends on ENABLE_MRC_CACHE
help

12
src/drivers/intel/fsp1_1/Kconfig
View File

@ -103,7 +103,6 @@ config MRC_CACHE_FILE
config MRC_CACHE_LOC
hex "Fast Boot Data Cache location in CBFS"
default MRC_CACHE_LOC_OVERRIDE if OVERRIDE_CACHE_CACHE_LOC
default 0xfff50000
depends on ENABLE_MRC_CACHE
help
@ -113,11 +112,6 @@ config MRC_CACHE_LOC
and nothing else should be included in that sector, or IT WILL BE
ERASED.
config MRC_CACHE_LOC_OVERRIDE
hex
help
Sets the override CBFS location of the MRC/fast boot cache.
config MRC_CACHE_SIZE
hex "Fast Boot Data Cache Size"
default 0x10000
@ -130,12 +124,6 @@ config MRC_CACHE_SIZE
should be a full sector of the flash ROM chip and nothing else should
be included in CBFS in any sector that the fast boot cache data is in.
config OVERRIDE_CACHE_CACHE_LOC
bool
help
Selected by the platform to set a new default location for the
MRC/fast boot cache.
config VIRTUAL_ROM_SIZE
hex "Virtual ROM Size"
default ROM_SIZE

3
src/mainboard/intel/bakersport_fsp/Kconfig
View File

@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_2048
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select OVERRIDE_MRC_CACHE_LOC
select POST_IO
select ENABLE_BUILTIN_COM1 if FSP_PACKAGE_DEFAULT
select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
@ -59,7 +58,7 @@ config FSP_FILE
string
default "../intel/fsp/baytrail/BAYTRAIL_FSP_ECC.fd" if BOARD_INTEL_BAKERSPORT_FSP
config MRC_CACHE_LOC_OVERRIDE
config MRC_CACHE_LOC
hex
default 0xfff80000
depends on ENABLE_FSP_FAST_BOOT

3
src/mainboard/intel/bayleybay_fsp/Kconfig
View File

@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_2048
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select OVERRIDE_MRC_CACHE_LOC
select POST_IO
select ENABLE_BUILTIN_COM1 if FSP_PACKAGE_DEFAULT
select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
@ -59,7 +58,7 @@ config FSP_FILE
string
default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd"
config MRC_CACHE_LOC_OVERRIDE
config MRC_CACHE_LOC
hex
default 0xfff80000
depends on ENABLE_FSP_FAST_BOOT

3
src/mainboard/intel/minnowmax/Kconfig
View File

@ -26,7 +26,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_8192
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select OVERRIDE_MRC_CACHE_LOC
select TSC_MONOTONIC_TIMER
select HAVE_ACPI_RESUME
@ -58,7 +57,7 @@ config FSP_FILE
string
default "../intel/fsp/baytrail/BAYTRAIL_FSP.fd"
config MRC_CACHE_LOC_OVERRIDE
config MRC_CACHE_LOC
hex
default 0xfff80000
depends on ENABLE_FSP_FAST_BOOT

3
src/mainboard/siemens/mc_tcu3/Kconfig
View File

@ -25,7 +25,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
select BOARD_ROMSIZE_KB_16384
select HAVE_ACPI_TABLES
select HAVE_OPTION_TABLE
select OVERRIDE_MRC_CACHE_LOC
select INCLUDE_MICROCODE_IN_BUILD
select ENABLE_BUILTIN_COM1
select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT
@ -55,7 +54,7 @@ config CACHE_ROM_SIZE_OVERRIDE
hex
default 0x1000000
config MRC_CACHE_LOC_OVERRIDE
config MRC_CACHE_LOC
hex
default 0xfff80000
depends on ENABLE_FSP_FAST_BOOT