Move mainboard specific changes to the coreboot memory table into the

mainboard specific code. (And add a hook to allow other mainboards do
a similar thing if required)

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G Minnich <rminnich@gmail.com>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3812 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

src/arch/i386/boot/coreboot_table.c

@@ -357,7 +357,8 @@ static void lb_remove_memory_range(struct lb_memory *mem,
 	}
 }
 
-static void lb_add_memory_range(struct lb_memory *mem,
+/* This function is used in mainboard specific code, too */
+void lb_add_memory_range(struct lb_memory *mem,
 	uint32_t type, uint64_t start, uint64_t size)
 {
 	lb_remove_memory_range(mem, start, size);
@@ -447,15 +448,10 @@ unsigned long write_coreboot_table(
 	lb_add_memory_range(mem, LB_MEM_TABLE, 
 		rom_table_start, rom_table_end-rom_table_start);
 
-	/* AMD rs690 chip, we should remove the UMA from system memory. */
-#if (CONFIG_GFXUMA == 1) 
-	printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n", 
-	uma_memory_start, uma_memory_size);
-	lb_add_memory_range(mem, LB_MEM_TABLE, 
-		uma_memory_start, uma_memory_size);
+#if (HAVE_MAINBOARD_RESOURCES == 1)
+	add_mainboard_resources(mem);
 #endif
 
-
 	/* Note:
 	 * I assume that there is always memory at immediately after
 	 * the low_table_end.  This means that after I setup the coreboot table.

src/arch/i386/boot/coreboot_table.h

@@ -26,4 +26,7 @@ struct lb_memory *get_lb_mem(void);
 
 extern struct cmos_option_table option_table;
 
+/* defined by mainboard.c if the mainboard requires extra resources */
+int add_mainboard_resources(struct lb_memory *mem);
+
 #endif /* COREBOOT_TABLE_H */

src/config/Options.lb

@@ -1101,6 +1101,12 @@ define CONFIG_GFXUMA
         comment "GFX UMA"
 end
 
+define HAVE_MAINBOARD_RESOURCES
+	default 0
+	export always
+	comment "Enable if the mainboard/chipset requires extra entries in the memory map"
+end
+
 define CONFIG_SPLASH_GRAPHIC
 	default 0
 	export used

src/include/boot/coreboot_tables.h

@@ -43,12 +43,6 @@
  * See also: util/lbtdump/lbtdump.c
  */
 
-/* AMD rs690 chip, declare global variables. */
-#if (CONFIG_GFXUMA == 1) 
-	unsigned long uma_memory_start, uma_memory_size;
-#endif
-	
-
 struct lb_uint64 {
 	uint32_t lo;
 	uint32_t hi;

src/mainboard/amd/dbm690t/Options.lb

@@ -91,6 +91,7 @@ uses CONFIG_USE_PRINTK_IN_CAR
 
 uses CONFIG_VIDEO_MB
 uses CONFIG_GFXUMA
+uses HAVE_MAINBOARD_RESOURCES
 
 ###
 ### Build options
@@ -299,6 +300,7 @@ default MAINBOARD_POWER_ON_AFTER_POWER_FAIL="MAINBOARD_POWER_ON"
 
 default CONFIG_VIDEO_MB=1
 default CONFIG_GFXUMA=1
+default HAVE_MAINBOARD_RESOURCES=1
 
 ### End Options.lb
 end

src/mainboard/amd/dbm690t/mainboard.c

@@ -41,6 +41,8 @@ extern int do_smbus_write_byte(u32 smbus_io_base, u32 device, u32 address,
 #define ADT7461_write_byte(address, val) \
 	do_smbus_write_byte(SMBUS_IO_BASE, ADT7461_ADDRESS, address, val)
 
+unsigned long uma_memory_start, uma_memory_size;
+
 /********************************************************
 * dbm690t uses a BCM5789 as on-board NIC.
 * It has a pin named LOW_POWER to enable it into LOW POWER state.
@@ -242,12 +244,23 @@ void dbm690t_enable(device_t dev)
 	set_thermal_config();
 }
  
+int add_mainboard_resources(struct lb_memory *mem)
+{
+	/* UMA is removed from system memory in the northbridge code, but
+	 * in some circumstances we want the memory mentioned as reserved.
+ 	 */
+#if (CONFIG_GFXUMA == 1) 
+	printk_info("uma_memory_start=0x%x, uma_memory_size=0x%x \n", 
+	uma_memory_start, uma_memory_size);
+	lb_add_memory_range(mem, LB_MEM_RESERVED, 
+		uma_memory_start, uma_memory_size);
+#endif
+}
+
 /*
 * CONFIG_CHIP_NAME defined in Option.lb.
 */
 struct chip_operations mainboard_amd_dbm690t_ops = {
-#if CONFIG_CHIP_NAME == 1
-	CHIP_NAME("AMD Dbm690t   Mainboard")
-#endif
+	CHIP_NAME("AMD DBM690T   Mainboard")
 	.enable_dev = dbm690t_enable,
 };

src/southbridge/amd/rs690/rs690_cmn.c

@@ -307,6 +307,8 @@ u8 PcieTrainPort(device_t nb_dev, device_t dev, u32 port)
 */
 void rs690_set_tom(device_t nb_dev)
 {
+	extern unsigned long uma_memory_start;
+
 	/* set TOM */
 	pci_write_config32(nb_dev, 0x90, uma_memory_start);
 	nbmc_write_index(nb_dev, 0x1e, uma_memory_start);