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mb/google/drallion: Change touch enable pin default value 

Change GPP_B21 default to low. This can prevent power leakage
of non-touch sku.

BUG=b:142849034
BRANCH=N/A
TEST=Measure the power of non-touch sku, check GPP_B21 is 0V.
     Boot up with touch sku and check touch functional.

Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: I80a3e5dc224e4dab97c21fd469d8c3f2d3e774e0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36195
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Roy Mingi Park <roy.mingi.park@intel.com>
This commit is contained in:
Eric Lai 2019-10-21 19:37:30 +08:00 committed by Patrick Georgi
parent ba9ec2ce24
commit 046382b8c5
1 changed files with 1 additions and 1 deletions
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2
src/mainboard/google/drallion/variants/drallion/gpio.c
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@ -78,7 +78,7 @@ static const struct pad_config gpio_table[] = {
/* GSPI0_MOSI */ PAD_NC(GPP_B18, NONE),
/* GSPI1_CS# */ PAD_NC(GPP_B19, NONE), /* HDD_FALL_INT (nostuff) */
/* GSPI1_CLK */ PAD_NC(GPP_B20, NONE),
/* GSPI1_MISO */ PAD_CFG_GPO(GPP_B21, 1, PLTRST), /* PCH_3.3V_TS_EN */
/* GSPI1_MISO */ PAD_CFG_GPO(GPP_B21, 0, PLTRST), /* PCH_3.3V_TS_EN */
/* GSPI1_MOSI */ PAD_NC(GPP_B22, NONE),
/* SML1ALERT# */ PAD_NC(GPP_B23, DN_20K),