amd/picasso: Rename ramtop.c to memmap.c

Use a name consistent with the more recent soc/intel.

Change-Id: I491e609bed00dc79c628b321c74ad7f4cc31b5fe
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Kyösti Mälkki 2019-08-03 21:28:40 +03:00
parent 66cabe7ba2
commit 047a9e4ddc
2 changed files with 3 additions and 3 deletions

View File

@ -44,7 +44,7 @@ romstage-y += monotonic_timer.c
romstage-y += pmutil.c
romstage-y += reset.c
romstage-y += smbus.c
romstage-y += ramtop.c
romstage-y += memmap.c
romstage-$(CONFIG_PICASSO_UART) += uart.c
romstage-y += tsc_freq.c
romstage-y += southbridge.c
@ -62,7 +62,7 @@ verstage-$(CONFIG_SPI_FLASH) += spi.c
postcar-y += monotonic_timer.c
postcar-$(CONFIG_PICASSO_UART) += uart.c
postcar-y += ramtop.c
postcar-y += memmap.c
postcar-$(CONFIG_VBOOT_MEASURED_BOOT) += i2c.c
postcar-y += tsc_freq.c
@ -80,7 +80,7 @@ ramstage-y += reset.c
ramstage-y += sata.c
ramstage-y += sm.c
ramstage-y += smbus.c
ramstage-y += ramtop.c
ramstage-y += memmap.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi.c
ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c
ramstage-$(CONFIG_PICASSO_UART) += uart.c