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src/mb/pcengines/apu2/mainboard.c: Fix retrieving serial number 

Handle situation when first NIC is not BDF 1:0.0. The PCI enumeration
is different when a external PCIe device is connected to mPCIe2 slot
which is routed to first PCIe bridge. The first NIC is then assigned
BDF 2:0.0, because it is connected to the second PCIe bridge.

Read the secondary bus number from the NIC PCIe bridge before attempting
to read MAC adress and calculating serial number.

Change-Id: I9f89a6f3cd0c23a2d2924e587338f69c260b12f8
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/29842
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
This commit is contained in:
Michał Żygowski 2018-11-26 19:47:23 +01:00 committed by Patrick Georgi
parent 4d2d171f02
commit 0486458c73
1 changed files with 17 additions and 4 deletions
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21
src/mainboard/pcengines/apu2/mainboard.c
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@ -194,17 +194,30 @@ static void mainboard_final(void *chip_info)
const char *smbios_mainboard_serial_number(void) const char *smbios_mainboard_serial_number(void)
{ {
static char serial[10]; static char serial[10];
struct device *nic_dev; struct device *dev;
uintptr_t bar10; uintptr_t bar10;
u32 mac_addr = 0; u32 mac_addr = 0;
u32 bus_no;
int i; int i;
nic_dev = dev_find_slot(1, PCI_DEVFN(0, 0)); /*
if ((serial[0] != 0) || !nic_dev) * In case we have PCIe module connected to mPCIe2 slot, BDF 1:0.0 may
* not be a NIC, because mPCIe2 slot is routed to the very first PCIe
* bridge and the first NIC is connected to the second PCIe bridge.
* Read secondary bus number from the PCIe bridge where the first NIC is
* connected.
*/
dev = dev_find_slot(0, PCI_DEVFN(2, 2));
if ((serial[0] != 0) || !dev)
return serial;
bus_no = dev->link_list->secondary;
dev = dev_find_slot(bus_no, PCI_DEVFN(0, 0));
if (!dev)
return serial; return serial;
/* Read in the last 3 bytes of NIC's MAC address. */ /* Read in the last 3 bytes of NIC's MAC address. */
bar10 = pci_read_config32(nic_dev, 0x10); bar10 = pci_read_config32(dev, 0x10);
bar10 &= 0xFFFE0000; bar10 &= 0xFFFE0000;
bar10 += 0x5400; bar10 += 0x5400;
for (i = 3; i < 6; i++) { for (i = 3; i < 6; i++) {