rockchip/rk3399: Support LONG_WRITE type in MIPI DSI
Some panels need to transfer initial code, and some of them will be over 3 bytes, so support LONG_WRITE type in driver. Refactor mipi dsi transfer function to support it. Change-Id: I212c14165e074c40a4a1a25140d9e8dfdfba465f Signed-off-by: Lin Huang <hl@rock-chips.com> Reviewed-on: https://review.coreboot.org/23299 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
This commit is contained in:
Lin Huang
Julius Werner
parent
e87d3cdf59
commit
0499ce9f83
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@ -378,136 +378,137 @@ void mainboard_power_on_backlight(void)
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static struct panel_init_command kd097d04_init_commands[] = {
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/* voltage setting */
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{ 0xB0, 0x00 },
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{ 0xB2, 0x02 },
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{ 0xB3, 0x11 },
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{ 0xB4, 0x00 },
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{ 0xB6, 0x80 },
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MIPI_INIT_CMD(0xB0, 0x00),
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MIPI_INIT_CMD(0xB2, 0x02),
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MIPI_INIT_CMD(0xB3, 0x11),
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MIPI_INIT_CMD(0xB4, 0x00),
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MIPI_INIT_CMD(0xB6, 0x80),
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/* VCOM disable */
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{ 0xB8, 0x80 },
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{ 0xBA, 0x43 },
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MIPI_INIT_CMD(0xB8, 0x80),
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MIPI_INIT_CMD(0xBA, 0x43),
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/* VCOM setting */
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{ 0xBB, 0x53 },
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MIPI_INIT_CMD(0xBB, 0x53),
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/* VSP setting */
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{ 0xBC, 0x0A },
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MIPI_INIT_CMD(0xBC, 0x0A),
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/* VSN setting */
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{ 0xBD, 0x4A },
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MIPI_INIT_CMD(0xBD, 0x4A),
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/* VGH setting */
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{ 0xBE, 0x2F },
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MIPI_INIT_CMD(0xBE, 0x2F),
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/* VGL setting */
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{ 0xBF, 0x1A },
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{ 0xF0, 0x39 },
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{ 0xF1, 0x21 },
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MIPI_INIT_CMD(0xBF, 0x1A),
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MIPI_INIT_CMD(0xF0, 0x39),
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MIPI_INIT_CMD(0xF1, 0x21),
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/* Gamma setting */
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{ 0xB0, 0x02 },
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{ 0xC0, 0x00 },
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{ 0xC1, 0x01 },
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{ 0xC2, 0x0B },
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{ 0xC3, 0x15 },
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{ 0xC4, 0x22 },
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{ 0xC5, 0x11 },
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{ 0xC6, 0x15 },
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{ 0xC7, 0x19 },
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{ 0xC8, 0x1A },
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{ 0xC9, 0x16 },
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{ 0xCA, 0x18 },
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{ 0xCB, 0x13 },
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{ 0xCC, 0x18 },
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{ 0xCD, 0x13 },
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{ 0xCE, 0x1C },
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{ 0xCF, 0x19 },
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{ 0xD0, 0x21 },
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{ 0xD1, 0x2C },
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{ 0xD2, 0x2F },
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{ 0xD3, 0x30 },
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{ 0xD4, 0x19 },
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{ 0xD5, 0x1F },
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{ 0xD6, 0x00 },
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{ 0xD7, 0x01 },
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{ 0xD8, 0x0B },
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{ 0xD9, 0x15 },
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{ 0xDA, 0x22 },
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{ 0xDB, 0x11 },
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{ 0xDC, 0x15 },
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{ 0xDD, 0x19 },
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{ 0xDE, 0x1A },
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{ 0xDF, 0x16 },
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{ 0xE0, 0x18 },
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{ 0xE1, 0x13 },
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{ 0xE2, 0x18 },
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{ 0xE3, 0x13 },
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{ 0xE4, 0x1C },
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{ 0xE5, 0x19 },
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{ 0xE6, 0x21 },
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{ 0xE7, 0x2C },
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{ 0xE8, 0x2F },
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{ 0xE9, 0x30 },
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{ 0xEA, 0x19 },
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{ 0xEB, 0x1F },
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MIPI_INIT_CMD(0xB0, 0x02),
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MIPI_INIT_CMD(0xC0, 0x00),
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MIPI_INIT_CMD(0xC1, 0x01),
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MIPI_INIT_CMD(0xC2, 0x0B),
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MIPI_INIT_CMD(0xC3, 0x15),
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MIPI_INIT_CMD(0xC4, 0x22),
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MIPI_INIT_CMD(0xC5, 0x11),
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MIPI_INIT_CMD(0xC6, 0x15),
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MIPI_INIT_CMD(0xC7, 0x19),
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MIPI_INIT_CMD(0xC8, 0x1A),
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MIPI_INIT_CMD(0xC9, 0x16),
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MIPI_INIT_CMD(0xCA, 0x18),
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MIPI_INIT_CMD(0xCB, 0x13),
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MIPI_INIT_CMD(0xCC, 0x18),
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MIPI_INIT_CMD(0xCD, 0x13),
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MIPI_INIT_CMD(0xCE, 0x1C),
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MIPI_INIT_CMD(0xCF, 0x19),
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MIPI_INIT_CMD(0xD0, 0x21),
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MIPI_INIT_CMD(0xD1, 0x2C),
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MIPI_INIT_CMD(0xD2, 0x2F),
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MIPI_INIT_CMD(0xD3, 0x30),
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MIPI_INIT_CMD(0xD4, 0x19),
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MIPI_INIT_CMD(0xD5, 0x1F),
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MIPI_INIT_CMD(0xD6, 0x00),
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MIPI_INIT_CMD(0xD7, 0x01),
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MIPI_INIT_CMD(0xD8, 0x0B),
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MIPI_INIT_CMD(0xD9, 0x15),
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MIPI_INIT_CMD(0xDA, 0x22),
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MIPI_INIT_CMD(0xDB, 0x11),
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MIPI_INIT_CMD(0xDC, 0x15),
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MIPI_INIT_CMD(0xDD, 0x19),
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MIPI_INIT_CMD(0xDE, 0x1A),
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MIPI_INIT_CMD(0xDF, 0x16),
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MIPI_INIT_CMD(0xE0, 0x18),
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MIPI_INIT_CMD(0xE1, 0x13),
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MIPI_INIT_CMD(0xE2, 0x18),
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MIPI_INIT_CMD(0xE3, 0x13),
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MIPI_INIT_CMD(0xE4, 0x1C),
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MIPI_INIT_CMD(0xE5, 0x19),
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MIPI_INIT_CMD(0xE6, 0x21),
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MIPI_INIT_CMD(0xE7, 0x2C),
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MIPI_INIT_CMD(0xE8, 0x2F),
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MIPI_INIT_CMD(0xE9, 0x30),
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MIPI_INIT_CMD(0xEA, 0x19),
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MIPI_INIT_CMD(0xEB, 0x1F),
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/* GOA MUX setting */
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{ 0xB0, 0x01 },
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{ 0xC0, 0x10 },
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{ 0xC1, 0x0F },
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{ 0xC2, 0x0E },
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{ 0xC3, 0x0D },
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{ 0xC4, 0x0C },
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{ 0xC5, 0x0B },
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{ 0xC6, 0x0A },
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{ 0xC7, 0x09 },
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{ 0xC8, 0x08 },
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{ 0xC9, 0x07 },
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{ 0xCA, 0x06 },
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{ 0xCB, 0x05 },
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{ 0xCC, 0x00 },
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{ 0xCD, 0x01 },
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{ 0xCE, 0x02 },
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{ 0xCF, 0x03 },
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{ 0xD0, 0x04 },
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{ 0xD6, 0x10 },
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{ 0xD7, 0x0F },
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{ 0xD8, 0x0E },
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{ 0xD9, 0x0D },
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{ 0xDA, 0x0C },
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{ 0xDB, 0x0B },
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{ 0xDC, 0x0A },
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{ 0xDD, 0x09 },
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{ 0xDE, 0x08 },
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{ 0xDF, 0x07 },
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{ 0xE0, 0x06 },
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{ 0xE1, 0x05 },
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{ 0xE2, 0x00 },
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{ 0xE3, 0x01 },
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{ 0xE4, 0x02 },
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{ 0xE5, 0x03 },
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{ 0xE6, 0x04 },
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{ 0xE7, 0x00 },
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{ 0xEC, 0xC0 },
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MIPI_INIT_CMD(0xB0, 0x01),
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MIPI_INIT_CMD(0xC0, 0x10),
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MIPI_INIT_CMD(0xC1, 0x0F),
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MIPI_INIT_CMD(0xC2, 0x0E),
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MIPI_INIT_CMD(0xC3, 0x0D),
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MIPI_INIT_CMD(0xC4, 0x0C),
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MIPI_INIT_CMD(0xC5, 0x0B),
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MIPI_INIT_CMD(0xC6, 0x0A),
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MIPI_INIT_CMD(0xC7, 0x09),
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MIPI_INIT_CMD(0xC8, 0x08),
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MIPI_INIT_CMD(0xC9, 0x07),
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MIPI_INIT_CMD(0xCA, 0x06),
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MIPI_INIT_CMD(0xCB, 0x05),
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MIPI_INIT_CMD(0xCC, 0x00),
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MIPI_INIT_CMD(0xCD, 0x01),
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MIPI_INIT_CMD(0xCE, 0x02),
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MIPI_INIT_CMD(0xCF, 0x03),
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MIPI_INIT_CMD(0xD0, 0x04),
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MIPI_INIT_CMD(0xD6, 0x10),
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MIPI_INIT_CMD(0xD7, 0x0F),
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MIPI_INIT_CMD(0xD8, 0x0E),
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MIPI_INIT_CMD(0xD9, 0x0D),
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MIPI_INIT_CMD(0xDA, 0x0C),
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MIPI_INIT_CMD(0xDB, 0x0B),
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MIPI_INIT_CMD(0xDC, 0x0A),
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MIPI_INIT_CMD(0xDD, 0x09),
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MIPI_INIT_CMD(0xDE, 0x08),
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MIPI_INIT_CMD(0xDF, 0x07),
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MIPI_INIT_CMD(0xE0, 0x06),
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MIPI_INIT_CMD(0xE1, 0x05),
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MIPI_INIT_CMD(0xE2, 0x00),
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MIPI_INIT_CMD(0xE3, 0x01),
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MIPI_INIT_CMD(0xE4, 0x02),
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MIPI_INIT_CMD(0xE5, 0x03),
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MIPI_INIT_CMD(0xE6, 0x04),
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MIPI_INIT_CMD(0xE7, 0x00),
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MIPI_INIT_CMD(0xEC, 0xC0),
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/* GOA timing setting */
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{ 0xB0, 0x03 },
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{ 0xC0, 0x01 },
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{ 0xC2, 0x6F },
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{ 0xC3, 0x6F },
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{ 0xC5, 0x36 },
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{ 0xC8, 0x08 },
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{ 0xC9, 0x04 },
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{ 0xCA, 0x41 },
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{ 0xCC, 0x43 },
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{ 0xCF, 0x60 },
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{ 0xD2, 0x04 },
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{ 0xD3, 0x04 },
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{ 0xD4, 0x03 },
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{ 0xD5, 0x02 },
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{ 0xD6, 0x01 },
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{ 0xD7, 0x00 },
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{ 0xDB, 0x01 },
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{ 0xDE, 0x36 },
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{ 0xE6, 0x6F },
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{ 0xE7, 0x6F },
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MIPI_INIT_CMD(0xB0, 0x03),
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MIPI_INIT_CMD(0xC0, 0x01),
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MIPI_INIT_CMD(0xC2, 0x6F),
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MIPI_INIT_CMD(0xC3, 0x6F),
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MIPI_INIT_CMD(0xC5, 0x36),
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MIPI_INIT_CMD(0xC8, 0x08),
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MIPI_INIT_CMD(0xC9, 0x04),
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MIPI_INIT_CMD(0xCA, 0x41),
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MIPI_INIT_CMD(0xCC, 0x43),
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MIPI_INIT_CMD(0xCF, 0x60),
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MIPI_INIT_CMD(0xD2, 0x04),
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MIPI_INIT_CMD(0xD3, 0x04),
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MIPI_INIT_CMD(0xD4, 0x03),
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MIPI_INIT_CMD(0xD5, 0x02),
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MIPI_INIT_CMD(0xD6, 0x01),
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MIPI_INIT_CMD(0xD7, 0x00),
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MIPI_INIT_CMD(0xDB, 0x01),
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MIPI_INIT_CMD(0xDE, 0x36),
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MIPI_INIT_CMD(0xE6, 0x6F),
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MIPI_INIT_CMD(0xE7, 0x6F),
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/* GOE setting */
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{ 0xB0, 0x06 },
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{ 0xB8, 0xA5 },
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{ 0xC0, 0xA5 },
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{ 0xD5, 0x3F },
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MIPI_INIT_CMD(0xB0, 0x06),
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MIPI_INIT_CMD(0xB8, 0xA5),
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MIPI_INIT_CMD(0xC0, 0xA5),
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MIPI_INIT_CMD(0xD5, 0x3F),
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{},
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};
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const struct mipi_panel_data kd097d04_panel = {
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@ -517,7 +518,6 @@ const struct mipi_panel_data kd097d04_panel = {
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.display_on_udelay = 120000,
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.video_mode_udelay = 5000,
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.init_cmd = kd097d04_init_commands,
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.num_init_commands = ARRAY_SIZE(kd097d04_init_commands)
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};
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static const struct edid_mode kd097d04_edid_mode = {
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@ -264,9 +264,14 @@ check_member(rk_mipi_regs, dsi_int_msk1, 0xc8);
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#define GEN_RD_CMD_BUSY BIT(6)
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#define MIPI_DSI_DCS_SHORT_WRITE 0x05
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#define MIPI_DSI_DCS_SHORT_WRITE_PARAM 0x15
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#define MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM 0x23
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#define MIPI_DSI_DCS_LONG_WRITE 0x39
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#define MIPI_INIT_CMD(...) { \
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.len = sizeof((char[]){__VA_ARGS__}), \
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.data = (char[]){__VA_ARGS__} }
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enum mipi_dsi_pixel_format {
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MIPI_DSI_FMT_RGB888,
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MIPI_DSI_FMT_RGB666,
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@ -324,8 +329,8 @@ struct rk_mipi_dsi {
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};
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struct panel_init_command {
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u8 cmd;
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u8 data;
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int len;
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char *data;
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};
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struct mipi_panel_data {
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@ -334,7 +339,6 @@ struct mipi_panel_data {
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u8 lanes;
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u32 display_on_udelay;
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u32 video_mode_udelay;
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u32 num_init_commands;
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struct panel_init_command *init_cmd;
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};
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@ -549,7 +549,7 @@ static void rk_mipi_message_config(struct rk_mipi_dsi *dsi)
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write32(&dsi->mipi_regs->dsi_cmd_mode_cfg, CMD_MODE_ALL_LP);
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}
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static int rk_mipi_dsi_check_cmd_fifo(struct rk_mipi_dsi *dsi)
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static int rk_mipi_dsi_check_fifo(struct rk_mipi_dsi *dsi, u32 flag)
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{
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struct stopwatch sw;
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int val;
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@ -557,7 +557,7 @@ static int rk_mipi_dsi_check_cmd_fifo(struct rk_mipi_dsi *dsi)
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stopwatch_init_msecs_expire(&sw, 20);
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do {
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val = read32(&dsi->mipi_regs->dsi_cmd_pkt_status);
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if (!(val & GEN_CMD_FULL))
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if (!(val & flag))
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return 0 ;
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} while (!stopwatch_expired(&sw));
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@ -570,7 +570,7 @@ static int rk_mipi_dsi_gen_pkt_hdr_write(struct rk_mipi_dsi *dsi, u32 hdr_val)
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struct stopwatch sw;
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u32 mask;
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if (rk_mipi_dsi_check_cmd_fifo(dsi)) {
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if (rk_mipi_dsi_check_fifo(dsi, GEN_CMD_FULL)) {
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printk(BIOS_ERR, "failed to get available command FIFO\n");
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return -1;
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}
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@ -600,15 +600,65 @@ static int rk_mipi_dsi_dcs_cmd(struct rk_mipi_dsi *dsi, u8 cmd)
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return rk_mipi_dsi_gen_pkt_hdr_write(dsi, val);
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}
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static int rk_mipi_dsi_dci_cmd_arg(struct rk_mipi_dsi *dsi, u8 cmd, u8 arg)
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static int rk_mipi_dsi_dci_long_write(struct rk_mipi_dsi *dsi,
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char *data, u32 len)
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{
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u32 remainder;
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int ret = 0;
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while (len) {
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if (len < 4) {
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remainder = 0;
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memcpy(&remainder, data, len);
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write32(&dsi->mipi_regs->dsi_gen_pld_data, remainder);
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len = 0;
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} else {
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remainder = *(u32 *)data;
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write32(&dsi->mipi_regs->dsi_gen_pld_data, remainder);
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data += 4;
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len -= 4;
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}
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ret = rk_mipi_dsi_check_fifo(dsi, GEN_PLD_W_FULL);
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if (ret) {
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printk(BIOS_ERR, "Failed to write fifo\n");
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return ret;
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}
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}
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return ret;
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}
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static int rk_mipi_dsi_write(struct rk_mipi_dsi *dsi, char *data, int len)
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{
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u16 buf = 0;
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u32 val;
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u16 data;
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int ret = 0;
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rk_mipi_message_config(dsi);
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data = cmd | (arg << 8);
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val = GEN_HDATA(data) | GEN_HTYPE(MIPI_DSI_GENERIC_SHORT_WRITE_2_PARAM);
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switch (len) {
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case 0:
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die("not data!");
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case 1:
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val = GEN_HDATA(*data) |
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GEN_HTYPE(MIPI_DSI_DCS_SHORT_WRITE);
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break;
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case 2:
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buf = *data++;
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buf |= *data << 8;
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val = GEN_HDATA(buf) |
|
||||
GEN_HTYPE(MIPI_DSI_DCS_SHORT_WRITE_PARAM);
|
||||
break;
|
||||
default:
|
||||
ret = rk_mipi_dsi_dci_long_write(dsi, data, len);
|
||||
if (ret) {
|
||||
printk(BIOS_ERR, "error happened during long write\n");
|
||||
return ret;
|
||||
}
|
||||
val = GEN_HDATA(len) | GEN_HTYPE(MIPI_DSI_DCS_LONG_WRITE);
|
||||
break;
|
||||
}
|
||||
|
||||
return rk_mipi_dsi_gen_pkt_hdr_write(dsi, val);
|
||||
}
|
||||
|
|
@ -642,6 +692,7 @@ void rk_mipi_prepare(const struct edid *edid,
|
|||
const struct mipi_panel_data *panel_data)
|
||||
{
|
||||
int i, num;
|
||||
struct panel_init_command *cmds;
|
||||
|
||||
for (i = 0; i < panel_data->mipi_num; i++) {
|
||||
rk_mipi[i].lanes = panel_data->lanes / panel_data->mipi_num;
|
||||
|
|
@ -649,11 +700,21 @@ void rk_mipi_prepare(const struct edid *edid,
|
|||
rk_mipi_enable(&rk_mipi[i], edid, panel_data);
|
||||
}
|
||||
|
||||
for (num = 0; num < panel_data->num_init_commands; num++) {
|
||||
for (i = 0; i < panel_data->mipi_num; i++)
|
||||
rk_mipi_dsi_dci_cmd_arg(&rk_mipi[i],
|
||||
panel_data->init_cmd[num].cmd,
|
||||
panel_data->init_cmd[num].data);
|
||||
if (panel_data->init_cmd) {
|
||||
cmds = panel_data->init_cmd;
|
||||
for (num = 0; cmds[num].len != 0; num++) {
|
||||
struct panel_init_command *cmd = &cmds[num];
|
||||
for (i = 0; i < panel_data->mipi_num; i++) {
|
||||
if (rk_mipi_dsi_write(&rk_mipi[i], cmd->data,
|
||||
cmd->len))
|
||||
return;
|
||||
|
||||
/* make sure panel picks up the command */
|
||||
if (rk_mipi_dsi_dcs_cmd(&rk_mipi[i],
|
||||
MIPI_DCS_NOP))
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
for (i = 0; i < panel_data->mipi_num; i++) {
|
||||
|
|
|
|||
Loading…
Reference in New Issue