AMD K8 fam10: Refactor logic around SB_HT_CHAIN_ON_BUS0

Change-Id: I452a93af452073eeac4e6cb9bbc232dc59e911c1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8365
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <edward.ocallaghan@koparo.com>
Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com>
This commit is contained in:
Kyösti Mälkki 2015-02-05 13:36:54 +02:00
parent 37d5afb188
commit 04b1fc8669
2 changed files with 7 additions and 19 deletions

View File

@ -216,20 +216,12 @@ static u32 amdfam10_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool
* so we set the subordinate bus number to 0xff for the moment.
*/
if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) {
if ((CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) || !is_sblink)
max++;
} else if (is_sblink) {
} else if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 1) {
max++;
} else if (CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) {
// We can have 16 segmment and every segment have 256 bus,
// For that case need the kernel support mmio pci config.
/* One node can have 8 link and segn is the same. */
max++;
if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) && !is_sblink)
max = ALIGN_UP(max, 8);
}
link->secondary = max;
link->subordinate = link->secondary;

View File

@ -178,17 +178,13 @@ static u32 amdk8_scan_chain(device_t dev, u32 nodeid, struct bus *link, bool is_
* We have no idea how many busses are behind this bridge yet,
* so we set the subordinate bus number to 0xff for the moment.
*/
if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) {
max++;
} else if (is_sblink) {
} else if (CONFIG_SB_HT_CHAIN_ON_BUS0 == 1) {
if ((CONFIG_SB_HT_CHAIN_ON_BUS0 == 0) || !is_sblink)
max++;
} else if (CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) {
/* Second chain will be on 0x40, third 0x80, forth 0xc0. */
max++;
if ((CONFIG_SB_HT_CHAIN_ON_BUS0 > 1) && !is_sblink)
max = ALIGN_UP(max, 0x40);
}
link->secondary = max;
link->subordinate = link->secondary;