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nb/intel/i945: Add PCI id for I945GC

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Also drop an odd comment about the resource allocator which seems to
work fine, with the right id.

Change-Id: I9099211fe946c28f90dd7730345b81a3f7f6f545
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/17095
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Nico Huber 2016-10-22 20:01:34 +02:00 committed by Martin Roth
parent 3bfe3404df
commit 04be6b5949
1 changed files with 4 additions and 7 deletions
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11
src/northbridge/intel/i945/northbridge.c
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@ -177,11 +177,6 @@ static void mc_read_resources(device_t dev)
pci_dev_read_resources(dev);
/* So, this is one of the big mysteries in the coreboot resource
* allocator. This resource should make sure that the address space
* of the PCIe memory mapped config space bar. But it does not.
*/
/* We use 0xcf as an unused index for our PCIe bar so that we find it again */
resource = new_resource(dev, 0xcf);
resource->base = DEFAULT_PCIEXBAR;
@ -254,8 +249,10 @@ static struct device_operations mc_ops = {
.ops_pci = &intel_pci_ops,
};
static const unsigned short pci_device_ids[] = { 0x27a0, 0x27ac,
0 };
static const unsigned short pci_device_ids[] = {
0x2770, /* desktop */
0x27a0, 0x27ac, /* mobile */
0 };
static const struct pci_driver mc_driver __pci_driver = {
.ops = &mc_ops,