sb/intel/common/firmware: Enable me_cleaner for Nehalem

Recent patches in coreboot have fixed the freeze issues related to the
use of me_cleaner on Nehalem.

However, at least on the Lenovo X201, with me_cleaner some PCIe devices
(like the SATA and USB controllers) disappear. In particular, setting
the AltMeDisable bit ("-S" or "-s" flag) makes them disappear
completely, while unsetting it makes them disappear only during cold
boots.

This kind of behaviour was already observed by Youness Alaoui on the
Purism Librem laptops ([1]), and it seems related to some required
board-specific PCIe configuration in the ME's MFS partition.

For this reason, on the Lenovo X201, "-w EFFS" has been added to the
me_cleaner arguments, which whitelists the MFS-equivalent partition for
ME generation 2. This fixes all the issues, and the PCIe devices work as
expected.

[1] https://puri.sm/posts/deep-dive-into-intel-me-disablement/

Change-Id: Ie77a80d2cb4945cf1c984bdb0fb1cc2f18e82ebc
Signed-off-by: Nicola Corna <nicola@corna.info>
Reviewed-on: https://review.coreboot.org/27178
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
This commit is contained in:
Nicola Corna 2018-06-21 14:57:26 +02:00 committed by Patrick Georgi
parent 59790dded6
commit 04d2601426
3 changed files with 11 additions and 6 deletions

View File

@ -48,4 +48,10 @@ config CPU_ADDR_BITS
int int
default 36 default 36
# Without the Intel ME's EFFS partition some PCIe devices (like the USB and SATA
# controllers) don't work as expected
config ME_CLEANER_ARGS
string
default "-S -w EFFS"
endif endif

View File

@ -73,7 +73,8 @@ config CHECK_ME
config USE_ME_CLEANER config USE_ME_CLEANER
bool "Strip down the Intel ME/TXE firmware" bool "Strip down the Intel ME/TXE firmware"
depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_SANDYBRIDGE || \ depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_NEHALEM || \
NORTHBRIDGE_INTEL_SANDYBRIDGE || \
NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_HASWELL || \ NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_HASWELL || \
SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || \ SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || \
SOC_INTEL_KABYLAKE || SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL) SOC_INTEL_KABYLAKE || SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL)

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@ -1,4 +1,4 @@
.TH me_cleaner 1 "MARCH 2018" .TH me_cleaner 1 "JUNE 2018"
.SH me_cleaner .SH me_cleaner
.PP .PP
me_cleaner \- Tool for partial deblobbing of Intel ME/TXE firmware images me_cleaner \- Tool for partial deblobbing of Intel ME/TXE firmware images
@ -109,8 +109,8 @@ c c c c
c c c c c c c c
. .
PCH CPU ME SKU PCH CPU ME SKU
Ibex Peak * Nehalem/Westmere 6.0 Ignition Ibex Peak Nehalem/Westmere 6.0 Ignition
Ibex Peak * Nehalem/Westmere 6.x 1.5/5 MB Ibex Peak Nehalem/Westmere 6.x 1.5/5 MB
Cougar Point Sandy Bridge 7.x 1.5/5 MB Cougar Point Sandy Bridge 7.x 1.5/5 MB
Panther Point Ivy Bridge 8.x 1.5/5 MB Panther Point Ivy Bridge 8.x 1.5/5 MB
Lynx/Wildcat Point Haswell/Broadwell 9.x 1.5/5 MB Lynx/Wildcat Point Haswell/Broadwell 9.x 1.5/5 MB
@ -127,8 +127,6 @@ SoC TXE SKU
Braswell/Cherry Trail 2.x 1.375 MB Braswell/Cherry Trail 2.x 1.375 MB
.TE .TE
.PP .PP
* Not working on coreboot
.PP
All the reports are available on the project's GitHub page \[la]https://github.com/corna/me_cleaner/issues/3\[ra]\&. All the reports are available on the project's GitHub page \[la]https://github.com/corna/me_cleaner/issues/3\[ra]\&.
.SH EXAMPLES .SH EXAMPLES
.PP .PP