sb/intel/common/firmware: Enable me_cleaner for Nehalem
Recent patches in coreboot have fixed the freeze issues related to the use of me_cleaner on Nehalem. However, at least on the Lenovo X201, with me_cleaner some PCIe devices (like the SATA and USB controllers) disappear. In particular, setting the AltMeDisable bit ("-S" or "-s" flag) makes them disappear completely, while unsetting it makes them disappear only during cold boots. This kind of behaviour was already observed by Youness Alaoui on the Purism Librem laptops ([1]), and it seems related to some required board-specific PCIe configuration in the ME's MFS partition. For this reason, on the Lenovo X201, "-w EFFS" has been added to the me_cleaner arguments, which whitelists the MFS-equivalent partition for ME generation 2. This fixes all the issues, and the PCIe devices work as expected. [1] https://puri.sm/posts/deep-dive-into-intel-me-disablement/ Change-Id: Ie77a80d2cb4945cf1c984bdb0fb1cc2f18e82ebc Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/27178 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -48,4 +48,10 @@ config CPU_ADDR_BITS
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int
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int
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default 36
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default 36
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# Without the Intel ME's EFFS partition some PCIe devices (like the USB and SATA
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# controllers) don't work as expected
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config ME_CLEANER_ARGS
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string
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default "-S -w EFFS"
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endif
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endif
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@ -73,7 +73,8 @@ config CHECK_ME
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config USE_ME_CLEANER
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config USE_ME_CLEANER
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bool "Strip down the Intel ME/TXE firmware"
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bool "Strip down the Intel ME/TXE firmware"
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depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_SANDYBRIDGE || \
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depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_NEHALEM || \
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NORTHBRIDGE_INTEL_SANDYBRIDGE || \
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NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_HASWELL || \
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NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_HASWELL || \
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SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || \
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SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || \
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SOC_INTEL_KABYLAKE || SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL)
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SOC_INTEL_KABYLAKE || SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL)
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@ -1,4 +1,4 @@
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.TH me_cleaner 1 "MARCH 2018"
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.TH me_cleaner 1 "JUNE 2018"
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.SH me_cleaner
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.SH me_cleaner
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.PP
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.PP
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me_cleaner \- Tool for partial deblobbing of Intel ME/TXE firmware images
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me_cleaner \- Tool for partial deblobbing of Intel ME/TXE firmware images
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@ -109,8 +109,8 @@ c c c c
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c c c c
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c c c c
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.
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.
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PCH CPU ME SKU
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PCH CPU ME SKU
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Ibex Peak * Nehalem/Westmere 6.0 Ignition
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Ibex Peak Nehalem/Westmere 6.0 Ignition
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Ibex Peak * Nehalem/Westmere 6.x 1.5/5 MB
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Ibex Peak Nehalem/Westmere 6.x 1.5/5 MB
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Cougar Point Sandy Bridge 7.x 1.5/5 MB
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Cougar Point Sandy Bridge 7.x 1.5/5 MB
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Panther Point Ivy Bridge 8.x 1.5/5 MB
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Panther Point Ivy Bridge 8.x 1.5/5 MB
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Lynx/Wildcat Point Haswell/Broadwell 9.x 1.5/5 MB
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Lynx/Wildcat Point Haswell/Broadwell 9.x 1.5/5 MB
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@ -127,8 +127,6 @@ SoC TXE SKU
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Braswell/Cherry Trail 2.x 1.375 MB
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Braswell/Cherry Trail 2.x 1.375 MB
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.TE
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.TE
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.PP
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.PP
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* Not working on coreboot
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.PP
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All the reports are available on the project's GitHub page \[la]https://github.com/corna/me_cleaner/issues/3\[ra]\&.
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All the reports are available on the project's GitHub page \[la]https://github.com/corna/me_cleaner/issues/3\[ra]\&.
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.SH EXAMPLES
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.SH EXAMPLES
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.PP
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.PP
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