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Move CAR settings for all GX1, GX2, LX and Intel Slot2 boards to the CPU. 

This automatically adds the settings for those boards that didn't have settings
at all yet. Also, small fixup to compareboard.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>

--> Please help porting all boards from newconfig to Kconfig <--

This is a lot of janitor work and we can use your helping hands.
The sooner we can get rid of Kbuild, the better. The KBuild report
on the mailing list shows the config differences between newconfig
and Kconfig. In theory, all Kconfig configs should be equal to their
newconfig pendant. In practice it's better to come close but stay 
clean.

--> Please help porting all boards from newconfig to Kconfig <--



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Stefan Reinauer 2010-02-04 01:32:43 +00:00 committed by Stefan Reinauer
parent 52da560bf6
commit 04d74b1fdd
13 changed files with 62 additions and 81 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
src/cpu/amd/model_gx1/Kconfig
View File

@ -21,3 +21,13 @@
config CPU_AMD_GX1
bool
config DCACHE_RAM_BASE
hex
default 0xc0000
depends on CPU_AMD_GX1
config DCACHE_RAM_SIZE
hex
default 0x01000
depends on CPU_AMD_GX1

30
src/cpu/amd/model_gx2/Kconfig
View File

@ -1,2 +1,32 @@
##
## This file is part of the coreboot project.
##
## Copyright (C) 2010 coresystems GmbH
##
## This program is free software; you can redistribute it and/or modify
## it under the terms of the GNU General Public License as published by
## the Free Software Foundation; version 2 of the License.
##
## This program is distributed in the hope that it will be useful,
## but WITHOUT ANY WARRANTY; without even the implied warranty of
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
## GNU General Public License for more details.
##
## You should have received a copy of the GNU General Public License
## along with this program; if not, write to the Free Software
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
config CPU_AMD_GX2
bool
config DCACHE_RAM_BASE
hex
default 0xc0000
depends on CPU_AMD_GX2
config DCACHE_RAM_SIZE
hex
default 0x01000
depends on CPU_AMD_GX2

10
src/cpu/amd/model_lx/Kconfig
View File

@ -1,3 +1,13 @@
config CPU_AMD_LX
bool
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on CPU_AMD_LX
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on CPU_AMD_LX

10
src/cpu/intel/slot_2/Kconfig
View File

@ -21,3 +21,13 @@
config CPU_INTEL_SLOT_2
bool
config DCACHE_RAM_BASE
hex
default 0xc0000
depends on CPU_INTEL_SLOT_2
config DCACHE_RAM_SIZE
hex
default 0x01000
depends on CPU_INTEL_SLOT2

10
src/mainboard/amd/db800/Kconfig
View File

@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 4
depends on BOARD_AMD_DB800
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_AMD_DB800
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_AMD_DB800
config RAMBASE
hex
default 0x4000

10
src/mainboard/amd/norwich/Kconfig
View File

@ -31,16 +31,6 @@ config IRQ_SLOT_COUNT
default 6
depends on BOARD_AMD_NORWICH
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_AMD_NORWICH
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_AMD_NORWICH
config RAMBASE
hex
default 0x4000

10
src/mainboard/artecgroup/dbe61/Kconfig
View File

@ -31,16 +31,6 @@ config IRQ_SLOT_COUNT
default 3
depends on BOARD_ARTECGROUP_DBE61
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_ARTECGROUP_DBE61
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_ARTECGROUP_DBE61
config RAMBASE
hex
default 0x4000

10
src/mainboard/digitallogic/msm800sev/Kconfig
View File

@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 9
depends on BOARD_DIGITALLOGIC_MSM800SEV
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_DIGITALLOGIC_MSM800SEV
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_DIGITALLOGIC_MSM800SEV
config RAMBASE
hex
default 0x4000

10
src/mainboard/iei/pcisa-lx-800-r10/Kconfig
View File

@ -31,16 +31,6 @@ config IRQ_SLOT_COUNT
default 9
depends on BOARD_IEI_PCISA_LX_800_R10
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_IEI_PCISA_LX_800_R10
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_IEI_PCISA_LX_800_R10
config RAMBASE
hex
default 0x4000

10
src/mainboard/lippert/roadrunner-lx/Kconfig
View File

@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 7
depends on BOARD_LIPPERT_ROADRUNNER_LX
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_LIPPERT_ROADRUNNER_LX
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_LIPPERT_ROADRUNNER_LX
config RAMBASE
hex
default 0x4000

10
src/mainboard/lippert/spacerunner-lx/Kconfig
View File

@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 7
depends on BOARD_LIPPERT_SPACERUNNER_LX
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_LIPPERT_SPACERUNNER_LX
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_LIPPERT_SPACERUNNER_LX
config RAMBASE
hex
default 0x4000

10
src/mainboard/pcengines/alix1c/Kconfig
View File

@ -32,16 +32,6 @@ config IRQ_SLOT_COUNT
default 5
depends on BOARD_PCENGINES_ALIX1C
config DCACHE_RAM_BASE
hex
default 0xc8000
depends on BOARD_PCENGINES_ALIX1C
config DCACHE_RAM_SIZE
hex
default 0x8000
depends on BOARD_PCENGINES_ALIX1C
config RAMBASE
hex
default 0x4000

3
util/compareboard/compareboard
View File

@ -56,6 +56,8 @@ fi
sed \
-e "/^CONFIG_CONSOLE_/ d" \
-e "/^CONFIG_MAXIMUM_CONSOLE_LOGLEVEL/ d" \
-e "/^CONFIG_DEFAULT_CONSOLE_LOGLEVEL/ d" \
-e "/^CONFIG_RESET_/ d" \
-e "/^CONFIG_XIP_ROM_/ d" \
-e "/^CONFIG_PRECOMPRESSED_PAYLOAD / d" \
@ -77,7 +79,6 @@ sed \
-e "/^CONFIG_STACK_SIZE / d" \
-e "/^CONFIG_GDB_STUB / d" \
-e "/^CONFIG_VIDEO_MB / d" \
-e "/^CONFIG_IOAPIC / d" \
-e "/^CONFIG_HAVE_MOVNTI / d" \
-e "/^CONFIG_PCIE_CONFIGSPACE_HOLE / d" \
$A/old > $A/old.filtered