GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/intel/common/block/fast_spi: Add flash PRR34 lock 

Set the flash PRR3 and PRR4 lock to be set with SPI FLOCKDN.

Change-Id: I288eea3e0e853e5067c5af23e22eab79330c0f20
Signed-off-by: Marc Jones <marcjones@sysproconsulting.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51779
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Marc Jones 2021-03-30 12:16:09 -06:00 committed by Patrick Georgi
parent 1bfe7b4edf
commit 051bf5d332
2 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/soc/intel/common/block/fast_spi/fast_spi.c
View File

@ -144,7 +144,7 @@ void fast_spi_set_opcode_menu(void)
void fast_spi_lock_bar(void)
{
void *spibar = fast_spi_get_bar();
uint16_t hsfs = SPIBAR_HSFSTS_FLOCKDN;
uint16_t hsfs = SPIBAR_HSFSTS_FLOCKDN | SPIBAR_HSFSTS_PRR34_LOCKDN;
if (CONFIG(FAST_SPI_DISABLE_WRITE_STATUS))
hsfs |= SPIBAR_HSFSTS_WRSDIS;

1
src/soc/intel/common/block/fast_spi/fast_spi_def.h
View File

@ -64,6 +64,7 @@
#define SPIBAR_HSFSTS_FLOCKDN (1 << 15)
#define SPIBAR_HSFSTS_FDV (1 << 14)
#define SPIBAR_HSFSTS_FDOPSS (1 << 13)
#define SPIBAR_HSFSTS_PRR34_LOCKDN (1 << 12)
#define SPIBAR_HSFSTS_WRSDIS (1 << 11)
#define SPIBAR_HSFSTS_SAF_CE (1 << 8)
#define SPIBAR_HSFSTS_SAF_ACTIVE (1 << 7)