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intel: Drop romstage handoff via scratchpad 

If HAVE_ACPI_RESUME ever gets implemented, use CBMEM handoff instead.

Change-Id: I77463988fa5324c729579902f4796be4da15d551
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/8182
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@google.com>
This commit is contained in:
Kyösti Mälkki 2015-01-09 09:57:26 +02:00
parent 7b132deb80
commit 05369de639
2 changed files with 0 additions and 44 deletions
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21
src/northbridge/intel/fsp_sandybridge/northbridge.c
View File

@ -329,26 +329,6 @@ static void northbridge_init(struct device *dev)
printk(BIOS_DEBUG, "Set BIOS_RESET_CPL\n"); printk(BIOS_DEBUG, "Set BIOS_RESET_CPL\n");
} }
static void northbridge_enable(device_t dev)
{
#if CONFIG_HAVE_ACPI_RESUME
switch (pci_read_config32(dev, SKPAD)) {
case 0xcafebabe:
printk(BIOS_DEBUG, "Normal boot.\n");
acpi_slp_type=0;
break;
case 0xcafed00d:
printk(BIOS_DEBUG, "S3 Resume.\n");
acpi_slp_type=3;
break;
default:
printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n");
acpi_slp_type=0;
break;
}
#endif
}
static struct pci_operations intel_pci_ops = { static struct pci_operations intel_pci_ops = {
.set_subsystem = intel_set_subsystem, .set_subsystem = intel_set_subsystem,
}; };
@ -358,7 +338,6 @@ static struct device_operations mc_ops = {
.set_resources = mc_set_resources, .set_resources = mc_set_resources,
.enable_resources = pci_dev_enable_resources, .enable_resources = pci_dev_enable_resources,
.init = northbridge_init, .init = northbridge_init,
.enable = northbridge_enable,
.scan_bus = 0, .scan_bus = 0,
.ops_pci = &intel_pci_ops, .ops_pci = &intel_pci_ops,
.acpi_fill_ssdt_generator = generate_cpu_entries, .acpi_fill_ssdt_generator = generate_cpu_entries,

23
src/northbridge/intel/sch/northbridge.c
View File

@ -250,26 +250,6 @@ static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device)
} }
} }
#if CONFIG_HAVE_ACPI_RESUME
static void northbridge_init(struct device *dev)
{
switch (pci_read_config32(dev, SKPAD)) {
case 0xcafebabe:
printk(BIOS_DEBUG, "Normal boot.\n");
acpi_slp_type = 0;
break;
case 0xcafed00d:
printk(BIOS_DEBUG, "S3 Resume.\n");
acpi_slp_type = 3;
break;
default:
printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n");
acpi_slp_type = 0;
break;
}
}
#endif
static struct pci_operations intel_pci_ops = { static struct pci_operations intel_pci_ops = {
.set_subsystem = intel_set_subsystem, .set_subsystem = intel_set_subsystem,
}; };
@ -278,9 +258,6 @@ static struct device_operations mc_ops = {
.read_resources = mc_read_resources, .read_resources = mc_read_resources,
.set_resources = mc_set_resources, .set_resources = mc_set_resources,
.enable_resources = pci_dev_enable_resources, .enable_resources = pci_dev_enable_resources,
#if CONFIG_HAVE_ACPI_RESUME
.init = northbridge_init,
#endif
.acpi_fill_ssdt_generator = generate_cpu_entries, .acpi_fill_ssdt_generator = generate_cpu_entries,
.scan_bus = 0, .scan_bus = 0,
.ops_pci = &intel_pci_ops, .ops_pci = &intel_pci_ops,