mb/google/poppy/variants/nocturne: enable p-states

This patch enables p-states for nocturne which was disabled by commit
de31587a (mb/google/poppy/variants/nocturne: disable p-states). p-states
feature was disabled as a temporary work-around as system was getting
hung while booting up. Now with IMVP7 firmwware turning and hardware
rework the issue is not seen, so its safe to enable p-states.

BUG=b:79666828
BRANCH=none
TEST=cherry picked Change-Id: I4c67c6a095aecc158e529a6b393baf03ec358a3d
patch and then "emerge-nocturne depthcharge coreboot chromeos-bootimage"
, flash spi image onto nocturne, boot to kernel and verify device stays
alive and responsive for several minutes without locking up.


Change-Id: I82d1516998cc26b789faa5d4e897feb06dc06020
Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com>
Reviewed-on: https://review.coreboot.org/27257
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Pratik Prajapati 2018-06-27 11:17:56 -07:00 committed by Patrick Georgi
parent 5eb2115c3d
commit 0545166485
1 changed files with 2 additions and 2 deletions

View File

@ -59,8 +59,8 @@ chip soc/intel/skylake
register "PmTimerDisabled" = "1" register "PmTimerDisabled" = "1"
register "VmxEnable" = "1" register "VmxEnable" = "1"
# Disable P-States # Set speed_shift_enable to 1 to enable P-States, and 0 to disable
register "speed_shift_enable" = "0" register "speed_shift_enable" = "1"
register "dptf_enable" = "1" register "dptf_enable" = "1"
register "tdp_pl2_override" = "15" register "tdp_pl2_override" = "15"
register "psys_pmax" = "45" register "psys_pmax" = "45"