vc/amd: move verstage on PSP files to new psp_verstage folder

Move the verstage on PSP files in vendorcode from the fsp subdirectory
to a new psp_verstage subdirectory, since those files aren't specific to
the case of the FSP being used for the silicon initialization.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Ic47f8b18bc515600add7838f4c7afcb4fff7c004
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80209
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Varshit Pandya <pandyavarshit@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
This commit is contained in:
Felix Held 2024-01-25 19:43:35 +01:00
parent 4687325448
commit 054b84294e
27 changed files with 17 additions and 18 deletions

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@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/cezanne/include
verstage-generic-ccopts += -I$(src)/vendorcode/amd/psp_verstage/cezanne/include
verstage-generic-ccopts += -I$(src)/soc/amd/common/psp_verstage/include
@ -10,5 +10,5 @@ verstage-y += svc.c
verstage-y += chipset.c
verstage-y += uart.c
verstage-y += $(top)/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/fsp/cezanne/bl_uapp/bl_uapp_end.S
verstage-y += $(top)/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/psp_verstage/cezanne/bl_uapp/bl_uapp_end.S

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@ -6,14 +6,14 @@ subdirs-y += ../../common/psp_verstage
verstage-generic-ccopts += -I$(src)/soc/amd/glinda/psp_verstage/include
verstage-generic-ccopts += -I$(src)/soc/amd/common/psp_verstage/include
verstage-generic-ccopts += -Isrc/vendorcode/amd/fsp/glinda/include
verstage-generic-ccopts += -Isrc/vendorcode/amd/fsp/common/include
verstage-generic-ccopts += -Isrc/vendorcode/amd/psp_verstage/glinda/include
verstage-generic-ccopts += -Isrc/vendorcode/amd/psp_verstage/common/include
verstage-y += svc.c
verstage-y += chipset.c
verstage-y += uart.c
verstage-y +=$(top)/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S
verstage-y +=$(top)/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_end.S
endif

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@ -1,6 +1,6 @@
# SPDX-License-Identifier: GPL-2.0-only
verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/mendocino/include
verstage-generic-ccopts += -I$(src)/vendorcode/amd/psp_verstage/mendocino/include
verstage-generic-ccopts += -I$(src)/soc/amd/common/psp_verstage/include
@ -10,5 +10,5 @@ verstage-y += svc.c
verstage-y += chipset.c
verstage-y += uart.c
verstage-y += $(top)/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/fsp/mendocino/bl_uapp/bl_uapp_end.S
verstage-y += $(top)/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/psp_verstage/mendocino/bl_uapp/bl_uapp_end.S

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@ -3,12 +3,12 @@
subdirs-$(CONFIG_VBOOT_STARTS_BEFORE_BOOTBLOCK) += ../../common/psp_verstage
verstage-generic-ccopts += -I$(src)/soc/amd/common/psp_verstage/include
verstage-generic-ccopts += -Isrc/vendorcode/amd/fsp/phoenix/include
verstage-generic-ccopts += -Isrc/vendorcode/amd/fsp/common/include
verstage-generic-ccopts += -Isrc/vendorcode/amd/psp_verstage/phoenix/include
verstage-generic-ccopts += -Isrc/vendorcode/amd/psp_verstage/common/include
verstage-y += svc.c
verstage-y += chipset.c
verstage-y += uart.c
verstage-y +=$(top)/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/fsp/common/bl_uapp/bl_uapp_end.S
verstage-y +=$(top)/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/psp_verstage/common/bl_uapp/bl_uapp_end.S

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@ -41,7 +41,6 @@ smm-y += gpio.c
CPPFLAGS_common += -I$(src)/soc/amd/picasso/include
CPPFLAGS_common += -I$(src)/soc/amd/picasso/acpi
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/picasso/include
CPPFLAGS_common += -I$(src)/vendorcode/amd/fsp/common
# 0x40 accounts for the cbfs_file struct + filename + metadata structs, aligned to 64 bytes

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@ -1,10 +1,10 @@
# SPDX-License-Identifier: GPL-2.0-only
verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/picasso/include
verstage-generic-ccopts += -I$(src)/vendorcode/amd/psp_verstage/picasso/include
verstage-y += svc.c
verstage-y += chipset.c
verstage-y += uart.c
verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S
verstage-y += $(top)/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_startup.S
verstage-y += $(top)/src/vendorcode/amd/psp_verstage/picasso/bl_uapp/bl_uapp_end.S