From 056f81988fdbc67af334d9dfba1e974cc577fa6b Mon Sep 17 00:00:00 2001 From: Jonathan Zhang Date: Tue, 11 Aug 2020 16:27:42 -0700 Subject: [PATCH] soc/intel/xeon_sp/cpx: remove unsupported configs coherency_support and ats_support are not supported by CPX-SP FSP. Remove them from soc_intel_xeon_sp_cpx_config struct. Remove corresponding settings from DeltaLake devicetree.cb. Signed-off-by: Jonathan Zhang Change-Id: Ibe1c4e88817fc4be7915e95fa829f0a4c0d947f2 Reviewed-on: https://review.coreboot.org/c/coreboot/+/44402 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Maxim Polyakov --- src/mainboard/ocp/deltalake/devicetree.cb | 3 --- src/soc/intel/xeon_sp/cpx/chip.h | 3 --- 2 files changed, 6 deletions(-) diff --git a/src/mainboard/ocp/deltalake/devicetree.cb b/src/mainboard/ocp/deltalake/devicetree.cb index f77a2149bd..24a2850fc9 100644 --- a/src/mainboard/ocp/deltalake/devicetree.cb +++ b/src/mainboard/ocp/deltalake/devicetree.cb @@ -33,9 +33,6 @@ chip soc/intel/xeon_sp/cpx # configure PSTATE_REQ_RATIO for MSR_IA32_PERF_CTRL register "pstate_req_ratio" = "0xa" - register "coherency_support" = "0" - register "ats_support" = "0" - register "gen1_dec" = "0x00fc0601" # BIC in-band update support register "gen2_dec" = "0x000c0ca1" # IPMI KCS diff --git a/src/soc/intel/xeon_sp/cpx/chip.h b/src/soc/intel/xeon_sp/cpx/chip.h index e46f34f653..aa605a4aad 100644 --- a/src/soc/intel/xeon_sp/cpx/chip.h +++ b/src/soc/intel/xeon_sp/cpx/chip.h @@ -84,9 +84,6 @@ struct soc_intel_xeon_sp_cpx_config { uint32_t pstate_req_ratio; - uint32_t coherency_support; - uint32_t ats_support; - /* Generic IO decode ranges */ uint32_t gen1_dec; uint32_t gen2_dec;