mb/google/asurada: Add generic DRAM groups

To reduce qualification effort, we want to pre-populate DRAM by their
size, package type and geometry so when a new DRAM is introduced we
don't need to spin off a new firmware release.

Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: I42ee170c159e551e840ab4e748f18f5149506b4f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51202
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/google/asurada/boardid.c

@@ -10,7 +10,8 @@
 #define ADC_LEVELS 15
 
 enum {
-	RAM_ID_CHANNEL = 3,
+	RAM_ID_HIGH_CHANNEL = 4,
+	RAM_ID_LOW_CHANNEL = 3,
 };
 
 static const unsigned int ram_voltages[ADC_LEVELS] = {
@@ -33,7 +34,8 @@ static const unsigned int ram_voltages[ADC_LEVELS] = {
 };
 
 static const unsigned int *adc_voltages[] = {
-	[RAM_ID_CHANNEL] = ram_voltages,
+	[RAM_ID_HIGH_CHANNEL] = ram_voltages,
+	[RAM_ID_LOW_CHANNEL] = ram_voltages,
 };
 
 static uint32_t get_adc_index(unsigned int channel)
@@ -63,8 +65,11 @@ uint32_t ram_code(void)
 {
 	static uint32_t cached_ram_code = BOARD_ID_INIT;
 
-	if (cached_ram_code == BOARD_ID_INIT)
-		cached_ram_code = get_adc_index(RAM_ID_CHANNEL);
+	if (cached_ram_code == BOARD_ID_INIT) {
+		cached_ram_code = (get_adc_index(RAM_ID_HIGH_CHANNEL) << 4 |
+				   get_adc_index(RAM_ID_LOW_CHANNEL));
+		printk(BIOS_DEBUG, "RAM Code: %#02x\n", cached_ram_code);
+	}
 
 	return cached_ram_code;
 }

src/mainboard/google/asurada/sdram_configs.c

@@ -5,9 +5,79 @@
 #include <console/console.h>
 #include <soc/dramc_param.h>
 
+/* Reference: go/asurada-id */
 static const char *const sdram_configs[] = {
-	[0] = "sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB",
-	[1] = "sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB",
+	/* Group 0x0: eMCP 4GB dual rank (with exceptions). */
+	[0x00] = "sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB",  /* 6GB */
+	[0x01] = "sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB",  /* single rank */
+	[0x02] = "sdram-lpddr4x-KMDP6001DA-B425-4GB",
+	[0x03] = "sdram-lpddr4x-KMDV6001DA-B620-4GB",
+	[0x04] = "sdram-lpddr4x-EMCP-2RANK-4GB",
+	[0x05] = "sdram-lpddr4x-EMCP-2RANK-4GB",
+	[0x06] = "sdram-lpddr4x-EMCP-2RANK-4GB",
+	[0x07] = "sdram-lpddr4x-EMCP-2RANK-4GB",
+	[0x08] = "sdram-lpddr4x-EMCP-2RANK-4GB",
+	[0x09] = "sdram-lpddr4x-EMCP-2RANK-4GB",
+	[0x0a] = "sdram-lpddr4x-EMCP-2RANK-4GB",
+	[0x0b] = "sdram-lpddr4x-EMCP-2RANK-4GB",
+
+	/* Group 0x1, 0x2, 0x3 are reserved for eMCP. */
+
+	/* Group 0x4: discrete 4GB single rank. */
+	[0x40] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x41] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x42] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x43] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x44] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x45] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x46] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x47] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x48] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x49] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x4a] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+	[0x4b] = "sdram-lpddr4x-DISCRETE-1RANK-4GB",
+
+	/* Group 0x5: discrete 4GB dual rank. */
+	[0x50] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x51] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x52] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x53] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x54] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x55] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x56] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x57] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x58] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x59] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x5a] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+	[0x5b] = "sdram-lpddr4x-DISCRETE-2RANK-4GB",
+
+	/* Group 0x6: discrete 8GB dual rank, normal mode */
+	[0x60] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x61] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x62] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x63] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x64] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x65] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x66] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x67] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x68] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x69] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x6a] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+	[0x6b] = "sdram-lpddr4x-DISCRETE-2RANK-8GB",
+
+	/* Group 0x7: discrete 8GB dual rank, byte mode. */
+	[0x70] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x71] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x72] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x73] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x74] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x75] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x76] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x77] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x78] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x79] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x7a] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
+	[0x7b] = "sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE",
 };
 
 static struct sdram_info params;

src/mainboard/google/asurada/sdram_params/Makefile.inc

@@ -1,6 +1,18 @@
 sdram-params :=
+
+# Generic parameters
+sdram-params += sdram-lpddr4x-EMCP-1RANK-4GB
+sdram-params += sdram-lpddr4x-EMCP-2RANK-4GB
+sdram-params += sdram-lpddr4x-EMCP-2RANK-8GB
+sdram-params += sdram-lpddr4x-DISCRETE-1RANK-4GB
+sdram-params += sdram-lpddr4x-DISCRETE-2RANK-4GB
+sdram-params += sdram-lpddr4x-DISCRETE-2RANK-8GB
+sdram-params += sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE
+
 sdram-params += sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB
 sdram-params += sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB
+sdram-params += sdram-lpddr4x-KMDP6001DA-B425-4GB
+sdram-params += sdram-lpddr4x-KMDV6001DA-B620-4GB
 
 $(foreach params,$(sdram-params), \
 	$(eval cbfs-files-y += $(params)) \

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-1RANK-4GB.c

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_1RK_4GB_4_0,
+	.ddr_type = DDR_TYPE_DISCRETE,
+};

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-4GB.c

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2,
+	.ddr_type = DDR_TYPE_DISCRETE,
+};

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB-BYTE-MODE.c

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4_BYTE,
+	.ddr_type = DDR_TYPE_DISCRETE,
+};

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-DISCRETE-2RANK-8GB.c

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4,
+	.ddr_type = DDR_TYPE_DISCRETE,
+};

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-1RANK-4GB.c

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_1RK_4GB_4_0,
+	.ddr_type = DDR_TYPE_EMCP,
+};

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-4GB.c

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2,
+	.ddr_type = DDR_TYPE_EMCP,
+};

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-EMCP-2RANK-8GB.c

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_8GB_4_4,
+	.ddr_type = DDR_TYPE_EMCP,
+};

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDP6001DA-B425-4GB.c

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2,
+	.ddr_type = DDR_TYPE_EMCP,
+};

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-KMDV6001DA-B620-4GB.c

@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <soc/dramc_param.h>
+
+struct sdram_info params = {
+	.ddr_geometry = DDR_TYPE_2CH_2RK_4GB_2_2,
+	.ddr_type = DDR_TYPE_EMCP,
+};

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZAD8GQFSL-046-4GB.c

@@ -4,4 +4,5 @@
 
 struct sdram_info params = {
 	.ddr_geometry = DDR_TYPE_2CH_1RK_4GB_4_0,
+	.ddr_type = DDR_TYPE_EMCP,
 };

src/mainboard/google/asurada/sdram_params/sdram-lpddr4x-MT29VZZZBD9DQKPR-046-6GB.c

@@ -4,4 +4,5 @@
 
 struct sdram_info params = {
 	.ddr_geometry = DDR_TYPE_2CH_2RK_6GB_3_3,
+	.ddr_type = DDR_TYPE_EMCP,
 };