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soc/intel/braswell,skylake: Drop logo parameters from devicetree 

We can never pass memory location of dynamically loaded BMP files in the
static devicetree. The parameters passed to FSP are filled at runtime.

Change-Id: Ib835ec0d9349ec96d5635e228063f2b7000b70fd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50361
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Kyösti Mälkki 2021-01-09 20:38:43 +02:00
parent 62044c3e57
commit 05d1e9e2fd
4 changed files with 0 additions and 15 deletions
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2
src/soc/intel/braswell/chip.c
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@ -120,8 +120,6 @@ void soc_silicon_init_params(SILICON_INIT_UPD *params)
params->PcdPchUsbHsicPort = config->PcdPchUsbHsicPort;
params->PcdPcieRootPortSpeed = 0;
params->PcdPchSsicEnable = config->PcdPchSsicEnable;
params->PcdLogoPtr = config->PcdLogoPtr;
params->PcdLogoSize = config->PcdLogoSize;
params->PcdRtcLock = 0;
params->PMIC_I2CBus = config->PMIC_I2CBus;
params->ISPEnable = config->ISPEnable;

2
src/soc/intel/braswell/chip.h
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@ -131,8 +131,6 @@ struct soc_intel_braswell_config {
uint8_t PcdPchUsbSsicPort;
uint8_t PcdPchUsbHsicPort;
uint8_t PcdPchSsicEnable;
uint32_t PcdLogoPtr;
uint32_t PcdLogoSize;
uint8_t PMIC_I2CBus;
uint8_t ISPEnable;
uint8_t ISPPciDevConfig;

3
src/soc/intel/skylake/chip.c
View File

@ -256,9 +256,6 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
dev = pcidev_path_on_root(PCH_DEVFN_CSE_3);
params->Heci3Enabled = dev && dev->enabled;
params->LogoPtr = config->LogoPtr;
params->LogoSize = config->LogoSize;
params->CpuConfig.Bits.VmxEnable = CONFIG(ENABLE_VMX);
params->PchPmWoWlanEnable = config->PchPmWoWlanEnable;

8
src/soc/intel/skylake/chip.h
View File

@ -288,14 +288,6 @@ struct soc_intel_skylake_config {
u8 SkipExtGfxScan;
u8 ScanExtGfxForLegacyOpRom;
/*
* The following fields come from fsp_vpd.h
* These are configuration values that are passed to FSP during
* SiliconInit.
*/
u32 LogoPtr;
u32 LogoSize;
/* GPIO IRQ Route The valid values is 14 or 15*/
u8 GpioIrqSelect;
/* SCI IRQ Select The valid values is 9, 10, 11 and 20 21, 22, 23*/