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util/spd_tools/src/spd_gen/lp5.go: Support LP5X 8533Mbps 

Add support for LP5X 8533Mbps in SPD tool.

BUG=b:263189532
TEST=None

Change-Id: I72b02514f68647dda996822f910db8bc93f61ca4
Signed-off-by: Kyle Lin <kylelinck@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73038
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marx Wang <marx.wang@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Kyle Lin 2023-02-14 16:52:50 +08:00 committed by Subrata Banik
parent 1000b0f088
commit 05d6f5a488
1 changed files with 5 additions and 0 deletions
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5
util/spd_tools/src/spd_gen/lp5.go
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@ -209,6 +209,7 @@ var LP5SetInfo = map[int]LP5Set{
* = 1 / (speed grade / 2 / WCK:CK) // "double data rate"
*/
speedToTCKMinPs: map[int]int{
8533: 937, /* 1 / (8533 / 2 / 4) */
7500: 1066, /* 1 / (7500 / 2 / 4) */
6400: 1250, /* 1 / (6400 / 2 / 4) */
5500: 1455, /* 1 / (5500 / 2 / 4) */
@ -373,6 +374,10 @@ var LP5BankArchToSPDEncoding = map[int]LP5BankArchParams{
* From Table 220 of JESD209-5B, using a 4:1 WCK:CK ratio and Set 0.
*/
var LP5SpeedMbpsToSPDEncoding = map[int]LP5SpeedParams{
8533: {
defaultTCKMinPs: 234, /* 1 / (8533 / 2) */
MaxCASLatency: 23,
},
7500: {
defaultTCKMinPs: 266, /* 1 / (7500 / 2) */
MaxCASLatency: 20,