soc/amd/common/data_fabric/extended_mmio: fix compile errors
This code only gets built when the SOC selects SOC_AMD_COMMON_BLOCK_DATA_FABRIC_EXTENDED_MMIO which no SoC before Genoa does. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Ia5495ebf0f157fd0c456ce44acaf1ab222a188dd Reviewed-on: https://review.coreboot.org/c/coreboot/+/78340 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <ericllai@google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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@ -10,13 +10,14 @@ void data_fabric_get_mmio_base_size(unsigned int reg, resource_t *mmio_base,
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{
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{
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const uint32_t base_reg = data_fabric_broadcast_read32(DF_MMIO_BASE(reg));
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const uint32_t base_reg = data_fabric_broadcast_read32(DF_MMIO_BASE(reg));
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const uint32_t limit_reg = data_fabric_broadcast_read32(DF_MMIO_LIMIT(reg));
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const uint32_t limit_reg = data_fabric_broadcast_read32(DF_MMIO_LIMIT(reg));
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const union df_mmio_addr_ext ext_reg.raw =
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const union df_mmio_addr_ext ext_reg = {
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data_fabric_broadcast_read32(DF_MMIO_ADDR_EXT(reg));
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.raw = data_fabric_broadcast_read32(DF_MMIO_ADDR_EXT(reg))
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};
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/* The raw register values in the base and limit registers are bits 47..16 of the
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/* The raw register values in the base and limit registers are bits 47..16 of the
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actual address. The MMIO address extension register contains the extended MMIO base
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actual address. The MMIO address extension register contains the extended MMIO base
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and limit bits starting with bit 48 of the actual address. */
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and limit bits starting with bit 48 of the actual address. */
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*mmio_base = (resource_t)ext_reg.base_ext << DF_MMIO_EXT_ADDR_SHIFT |
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*mmio_base = (resource_t)ext_reg.base_ext << DF_MMIO_EXT_ADDR_SHIFT |
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(resource_t)base_reg << DF_MMIO_SHIFT;
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(resource_t)base_reg << DF_MMIO_SHIFT;
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*mmio_limit = (resource_t)ext_reg.limit_ext << DF_MMIO_EXT_ADDR_SHIFT |
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*mmio_limit = ((resource_t)ext_reg.limit_ext << DF_MMIO_EXT_ADDR_SHIFT |
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(((resource_t)limit_reg + 1) << DF_MMIO_SHIFT) - 1;
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(((resource_t)limit_reg + 1) << DF_MMIO_SHIFT)) - 1;
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}
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}
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