mb/google/brya: Add variant specific soc chip config update
This patch adds support for variant specific soc chip config update function. Change-Id: Ic3a3ae0b409433e6dfa102c5e7a6322d4f78f730 Signed-off-by: Sugnan Prabhu S <sugnan.prabhu.s@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56411 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
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@ -4,8 +4,19 @@
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#include <baseboard/variants.h>
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#include <baseboard/variants.h>
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#include <device/device.h>
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#include <device/device.h>
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#include <ec/ec.h>
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#include <ec/ec.h>
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#include <soc/ramstage.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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#include <vendorcode/google/chromeos/chromeos.h>
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void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config)
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{
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variant_update_soc_chip_config(config);
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}
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__weak void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
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{
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/* default implementation does nothing */
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}
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static void mainboard_init(void *chip_info)
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static void mainboard_init(void *chip_info)
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{
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{
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const struct pad_config *base_pads;
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const struct pad_config *base_pads;
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@ -3,6 +3,7 @@
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#ifndef __BASEBOARD_VARIANTS_H__
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#ifndef __BASEBOARD_VARIANTS_H__
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#define __BASEBOARD_VARIANTS_H__
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#define __BASEBOARD_VARIANTS_H__
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#include <chip.h>
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#include <soc/gpio.h>
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#include <soc/gpio.h>
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#include <soc/meminit.h>
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#include <soc/meminit.h>
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#include <stdint.h>
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#include <stdint.h>
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@ -19,5 +20,6 @@ const struct cros_gpio *variant_cros_gpios(size_t *num);
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const struct mb_cfg *variant_memory_params(void);
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const struct mb_cfg *variant_memory_params(void);
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int variant_memory_sku(void);
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int variant_memory_sku(void);
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bool variant_is_half_populated(void);
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bool variant_is_half_populated(void);
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void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config);
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#endif /*__BASEBOARD_VARIANTS_H__ */
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#endif /*__BASEBOARD_VARIANTS_H__ */
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