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southbridge/intel/i82801gx: transition away from device_t 

Replace the use of the old device_t definition inside
southbridge/intel/i82801gx.

The patch has been tested both with the arch/io.h definition of device_t
enabled and disabled in order to ensure compatibility while the
transaction takes place.

Change-Id: Ia257318a7068b54739f319bfbba35f2a07826940
Signed-off-by: Antonello Dettori <dev@dettori.io>
Reviewed-on: https://review.coreboot.org/16370
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Antonello Dettori 2016-08-30 22:05:32 +02:00 committed by Martin Roth
parent 196e3d439e
commit 061d781e99
3 changed files with 5 additions and 3 deletions
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2
src/southbridge/intel/i82801gx/early_smbus.c
View File

@ -23,7 +23,7 @@
void enable_smbus(void)
{
device_t dev;
pci_devfn_t dev;
/* Set the SMBus device statically. */
dev = PCI_DEV(0x0, 0x1f, 0x3);

4
src/southbridge/intel/i82801gx/i82801gx.h
View File

@ -43,7 +43,9 @@
#if !defined(__ASSEMBLER__)
#if !defined(__PRE_RAM__)
#include "chip.h"
extern void i82801gx_enable(device_t dev);
#if !defined(__SIMPLE_DEVICE__)
void i82801gx_enable(device_t dev);
#endif
void gpi_route_interrupt(u8 gpi, u8 mode);
#else
void enable_smbus(void);

2
src/southbridge/intel/i82801gx/smihandler.c
View File

@ -276,7 +276,7 @@ static void busmaster_disable_on_bus(int bus)
for (slot = 0; slot < 0x20; slot++) {
for (func = 0; func < 8; func++) {
u32 reg32;
device_t dev = PCI_DEV(bus, slot, func);
pci_devfn_t dev = PCI_DEV(bus, slot, func);
val = pci_read_config32(dev, PCI_VENDOR_ID);