+
-romstage: 65% Done |
+bootblock: 100% Done |
+Type | Routine |
+Optional | bootblock_c_entry |
+Required | bootblock_main_with_timestamp |
+Optional | bootblock_mainboard_early_init |
+Optional | bootblock_mainboard_init |
+Required | bootblock_pre_c_entry |
+Required | bootblock_protected_mode_entry |
+Required | bootblock_soc_early_init |
+Optional | bootblock_soc_init |
+Required | tsc_freq_mhz |
+Required | uart_init |
+
+ |
+ |
+
+
+romstage: 66% Done |
Type | Routine |
Optional | arch_segment_loaded |
Optional | backup_top_of_ram |
@@ -14,6 +40,7 @@
Required | car_mainboard_pre_console_init |
Required | car_soc_post_console_init |
Required | car_soc_pre_console_init |
+Required | car_stage_entry |
Required | cbfs_master_header_locator |
Optional | cbmem_fail_resume |
Optional | clear_recovery_mode_switch |
@@ -67,7 +94,9 @@
Optional | vboot_platform_prepare_reboot |
Optional | verstage_mainboard_init |
-
+ |
+ |
+
ramstage: 55% Done |
Type | Routine |
@@ -125,6 +154,9 @@
Optional | wifi_regulatory_domain |
Optional | write_smp_table |
-
+ |
+ |
+
+