rambi: Update the DPTF configuration
- Add passive thresholds for thermal participants - Disable the charger participant and remove from _TRT BUG=chrome-os-partner:17279 BRANCH=rambi TEST=build and boot on rambi and start ESIF framework Change-Id: Ie5917413aceadee6e39594257aaafb0bcb399d09 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/181663 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/5029 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
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@ -1,11 +1,16 @@
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#define DPTF_TSR0_SENSOR_ID 1
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#define DPTF_TSR0_SENSOR_NAME "TMP432_Internal"
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#define DPTF_TSR0_PASSIVE 40
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#define DPTF_TSR1_SENSOR_ID 2
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#define DPTF_TSR1_SENSOR_NAME "TMP432_Power_top"
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#define DPTF_TSR1_PASSIVE 45
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#define DPTF_TSR2_SENSOR_ID 3
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#define DPTF_TSR2_SENSOR_NAME "TMP432_CPU_bottom"
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#define DPTF_TSR2_PASSIVE 35
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#undef DPTF_ENABLE_CHARGER
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Name (DTRT, Package () {
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/* CPU Throttle Effect on CPU */
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@ -13,15 +18,12 @@ Name (DTRT, Package () {
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/* CPU and Charger Effect on Temp Sensor 0 */
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Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR0, 100, 50, 0, 0, 0, 0 },
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Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR0, 80, 300, 0, 0, 0, 0 },
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/* CPU and Charger Effect on Temp Sensor 1 */
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Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR1, 100, 50, 0, 0, 0, 0 },
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Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 80, 300, 0, 0, 0, 0 },
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/* CPU and Charger Effect on Temp Sensor 2 */
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Package () { \_SB.DPTF.TCPU, \_SB.DPTF.TSR2, 100, 50, 0, 0, 0, 0 },
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Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 80, 300, 0, 0, 0, 0 },
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})
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/* Include Baytrail DPTF */
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