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mb/google: Shrink GBB section size 

Chrome OS firmware images have moved bitmap resources from GBB into CBFS
for a long time, so the GBB should only hold firmware keys and HWID,
that is usually less than 10k.

ARM boards usually limit GBB to 0x2f00 (see gru, cheza and kukui) but
many recent x86 simply copy from old settings and may run out of space
when we want to add more resources, for example EC RO software sync.

Note, changing the GBB section (inside RO) implies RO update,
so this change *must not* be cherry-picked back to old firmware
branches if some devices were already shipped.

BRANCH=none
BUG=None
TEST=make # board=darllion,hatch,kahlee,octopus,sarien

Change-Id: I615cd7b53b556019f2d54d0df7ac2723d36ee6cf
Signed-off-by: Hung-Te Lin <hungte@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36088
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Mathew King <mathewk@chromium.org>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
This commit is contained in:
Hung-Te Lin 2019-10-17 12:42:28 +08:00 committed by Patrick Georgi
parent a2ea5e9f47
commit 064d6cb8a5
6 changed files with 12 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/mainboard/google/drallion/chromeos.fmd
View File

@ -40,8 +40,8 @@ FLASH@0xfe000000 0x2000000 {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0
GBB@0x1000 0xef000
COREBOOT(CBFS)@0xf0000 0x300000
GBB@0x1000 0x3000
COREBOOT(CBFS)@0x4000 0x3ec000
}
}
}

4
src/mainboard/google/hatch/chromeos-16MiB.fmd
View File

@ -35,8 +35,8 @@ FLASH@0xff000000 0x1000000 {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0
GBB@0x1000 0xef000
COREBOOT(CBFS)@0xf0000 0x30c000
GBB@0x1000 0x3000
COREBOOT(CBFS)@0x4000 0x3f8000
}
}
}

4
src/mainboard/google/hatch/chromeos.fmd
View File

@ -39,8 +39,8 @@ FLASH@0xfe000000 0x2000000 {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0
GBB@0x1000 0xef000
COREBOOT(CBFS)@0xf0000 0x30c000
GBB@0x1000 0x3000
COREBOOT(CBFS)@0x4000 0x3f8000
}
}
}

4
src/mainboard/google/kahlee/variants/baseboard/chromeos.fmd
View File

@ -33,8 +33,8 @@ FLASH@0xFF000000 0x1000000 {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0
GBB@0x1000 0x70000
COREBOOT(CBFS)@0x71000 0x210000
GBB@0x1000 0x3000
COREBOOT(CBFS)@0x4000 0x27d000
}
}
}

4
src/mainboard/google/octopus/chromeos.fmd
View File

@ -7,8 +7,8 @@ FLASH 16M {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0
COREBOOT(CBFS)@0x1000 0x1bb000
GBB@0x1bc000 0x40000
COREBOOT(CBFS)@0x1000 0x1f8000
GBB@0x1f9000 0x3000
}
}
MISC_RW@0x400000 0x30000 {

4
src/mainboard/google/sarien/chromeos.fmd
View File

@ -41,8 +41,8 @@ FLASH@0xfe000000 0x2000000 {
FMAP@0x0 0x800
RO_FRID@0x800 0x40
RO_FRID_PAD@0x840 0x7c0
GBB@0x1000 0xef000
COREBOOT(CBFS)@0xf0000 0x300000
GBB@0x1000 0x3000
COREBOOT(CBFS)@0x4000 0x3ec000
}
}
}