gm45: Move S3 detection to enable stage.
Also move it to NB to be in line with other. Change-Id: Ibd961d60dcd686899f34f6a494c14ff9d65e618b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/6625 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -32,6 +32,7 @@
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#include <cbmem.h>
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#include <cbmem.h>
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#include "chip.h"
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#include "chip.h"
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#include "gm45.h"
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#include "gm45.h"
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#include "arch/acpi.h"
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/* Reserve everything between A segment and 1MB:
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/* Reserve everything between A segment and 1MB:
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*
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*
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@ -228,6 +229,23 @@ static void enable_dev(device_t dev)
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} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
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} else if (dev->path.type == DEVICE_PATH_CPU_CLUSTER) {
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dev->ops = &cpu_bus_ops;
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dev->ops = &cpu_bus_ops;
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}
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}
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#if CONFIG_HAVE_ACPI_RESUME
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switch (pci_read_config32(dev_find_slot(0, PCI_DEVFN(0, 0)), /*D0F0_SKPD*/0xdc)) {
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case SKPAD_NORMAL_BOOT_MAGIC:
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printk(BIOS_DEBUG, "Normal boot.\n");
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acpi_slp_type=0;
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break;
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case SKPAD_ACPI_S3_MAGIC:
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printk(BIOS_DEBUG, "S3 Resume.\n");
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acpi_slp_type=3;
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break;
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default:
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printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n");
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acpi_slp_type=0;
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break;
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}
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#endif
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}
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}
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static void gm45_init(void *const chip_info)
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static void gm45_init(void *const chip_info)
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@ -234,23 +234,6 @@ static void i82801ix_init(void *chip_info)
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outw(0x0008, DEFAULT_TCOBASE + 0x12); /* Set higher timer value. */
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outw(0x0008, DEFAULT_TCOBASE + 0x12); /* Set higher timer value. */
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#endif
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#endif
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outw(0x0000, DEFAULT_TCOBASE + 0x00); /* Update timer. */
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outw(0x0000, DEFAULT_TCOBASE + 0x00); /* Update timer. */
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#if CONFIG_HAVE_ACPI_RESUME
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switch (pci_read_config32(dev_find_slot(0, PCI_DEVFN(0, 0)), /*D0F0_SKPD*/0xdc)) {
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case SKPAD_NORMAL_BOOT_MAGIC:
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printk(BIOS_DEBUG, "Normal boot.\n");
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acpi_slp_type=0;
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break;
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case SKPAD_ACPI_S3_MAGIC:
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printk(BIOS_DEBUG, "S3 Resume.\n");
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acpi_slp_type=3;
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break;
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default:
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printk(BIOS_DEBUG, "Unknown boot method, assuming normal.\n");
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acpi_slp_type=0;
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break;
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}
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#endif
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}
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}
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struct chip_operations southbridge_intel_i82801ix_ops = {
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struct chip_operations southbridge_intel_i82801ix_ops = {
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