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CK804/MCP55 devicetree.cb cosmetic and indentation fixes. 

Add a few more comments for the entries, and also change the devicetree.cb
files to the more compact and better readable variant with indentation level
of 2 spaces (instead of random mix of tabs and spaces).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6071 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Uwe Hermann 2010-11-14 20:10:11 +00:00
parent 727edb0b32
commit 0675d5c34f
17 changed files with 2212 additions and 2245 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
src/mainboard/asus/a8n_e/devicetree.cb
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@ -1,14 +1,13 @@
chip northbridge/amd/amdk8/root_complex # Root complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on # APIC cluster device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_939 # Socket 939 CPU chip cpu/amd/socket_939 # CPU socket
device lapic 0 on end # APIC device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on # PCI domain device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 # mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on # Northbridge device pci 18.0 on # Link 0 == LDT 0
# Devices on link 0, link 0 == LDT 0
chip southbridge/nvidia/ck804 # Southbridge chip southbridge/nvidia/ck804 # Southbridge
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
@ -62,7 +61,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
io 0xc8 = 0x0000 io 0xc8 = 0x0000
io 0xca = 0x0500 io 0xca = 0x0500
end end
device pnp 2e.8 on # Midi port device pnp 2e.8 on # MIDI port
io 0x60 = 0x300 io 0x60 = 0x300
irq 0x70 = 10 irq 0x70 = 10
end end
@ -76,28 +75,28 @@ chip northbridge/amd/amdk8/root_complex # Root complex
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
# chip drivers/generic/generic #dimm 0-0-0 # chip drivers/generic/generic # DIMM 0-0-0
# device i2c 50 on end # device i2c 50 on end
# end # end
# chip drivers/generic/generic #dimm 0-0-1 # chip drivers/generic/generic # DIMM 0-0-1
# device i2c 51 on end # device i2c 51 on end
# end # end
# chip drivers/generic/generic #dimm 0-1-0 # chip drivers/generic/generic # DIMM 0-1-0
# device i2c 52 on end # device i2c 52 on end
# end # end
# chip drivers/generic/generic #dimm 0-1-1 # chip drivers/generic/generic # DIMM 0-1-1
# device i2c 53 on end # device i2c 53 on end
# end # end
# chip drivers/generic/generic #dimm 1-0-0 # chip drivers/generic/generic # DIMM 1-0-0
# device i2c 54 on end # device i2c 54 on end
# end # end
# chip drivers/generic/generic #dimm 1-0-1 # chip drivers/generic/generic # DIMM 1-0-1
# device i2c 55 on end # device i2c 55 on end
# end # end
# chip drivers/generic/generic #dimm 1-1-0 # chip drivers/generic/generic # DIMM 1-1-0
# device i2c 56 on end # device i2c 56 on end
# end # end
# chip drivers/generic/generic #dimm 1-1-1 # chip drivers/generic/generic # DIMM 1-1-1
# device i2c 57 on end # device i2c 57 on end
# end # end
end end
@ -118,6 +117,7 @@ chip northbridge/amd/amdk8/root_complex # Root complex
register "ide1_enable" = "1" register "ide1_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
# TODO
# register "mac_eeprom_smbus" = "3" # register "mac_eeprom_smbus" = "3"
# register "mac_eeprom_addr" = "0x51" # register "mac_eeprom_addr" = "0x51"
end end

127
src/mainboard/gigabyte/m57sli/devicetree.cb
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@ -1,22 +1,21 @@
chip northbridge/amd/amdk8/root_complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_AM2 chip cpu/amd/socket_AM2 # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 #mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on # devices on link 0, link 0 == LDT 0 device pci 18.0 on # Link 0 == LDT 0
chip southbridge/nvidia/mcp55 chip southbridge/nvidia/mcp55 # Southbridge
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/ite/it8716f chip superio/ite/it8716f # Super I/O
# Floppy and any LDN device pnp 2e.0 on # Floppy and any LDN
device pnp 2e.0 on # Watchdog from CLKIN (24 MHz)
# Watchdog from CLKIN, CLKIN = 24 MHz
irq 0x23 = 0x11 irq 0x23 = 0x11
# Serial Flash (SPI only) # Serial Flash (SPI only)
#0x24 = 0x1a # 0x24 = 0x1a
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
@ -29,42 +28,46 @@ device pci_domain 0 on
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.3 on # Parallel Port device pnp 2e.3 on # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
device pnp 2e.4 on # EC device pnp 2e.4 on # Embedded controller
io 0x60 = 0x290 io 0x60 = 0x290
io 0x62 = 0x230 io 0x62 = 0x230
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
end end
device pnp 2e.6 on # Mouse device pnp 2e.6 on # PS/2 mouse
irq 0x70 = 12 irq 0x70 = 12
end end
device pnp 2e.7 on # GPIO, SPI flash device pnp 2e.7 on # GPIO, SPI flash
# pin 84 is not GP10 # Pin 84 is not GP10
irq 0x25 = 0x0 irq 0x25 = 0x0
# pin 21 is GP26, pin 26 is GP21, pin 27 is GP20 # Pin 21 is GP26, pin 26 is GP21, pin 27 is GP20
irq 0x26 = 0x43 irq 0x26 = 0x43
# pin 13 is GP35 # Pin 13 is GP35
irq 0x27 = 0x20 irq 0x27 = 0x20
# pin 70 is not GP46 # Pin 70 is not GP46
#irq 0x28 = 0x0 # irq 0x28 = 0x0
# pin 6,3,128,127,126 is GP63,64,65,66,67 # Pin 6,3,128,127,126 is GP63,64,65,66,67
irq 0x29 = 0x81 irq 0x29 = 0x81
# Enable FAN_CTL/FAN_TAC set to 5 (pin 21,23), enable FAN_CTL/FAN_TAC set to 4 (pin 20,22), pin 48 is PCIRST5#, pin91 is PCIRSTIN#, VIN7 is internal voltage divider for VCCH5V, pin 95 is ATXPG, VIN3 is internal voltage divider for VCC5V # Enable FAN_CTL/FAN_TAC set to 5 (pin 21, 23),
#irq 0x2c = 0x1f # enable FAN_CTL/FAN_TAC set to 4 (pin 20, 22),
# pin 48 is PCIRST5#, pin91 is PCIRSTIN#, VIN7 is internal
# voltage divider for VCCH5V, pin 95 is ATXPG, VIN3 is internal
# voltage divider for VCC5V
# irq 0x2c = 0x1f
# Simple I/O base # Simple I/O base
io 0x62 = 0x800 io 0x62 = 0x800
# Serial Flash I/O (SPI only) # Serial Flash I/O (SPI only)
io 0x64 = 0x820 io 0x64 = 0x820
# watch dog force timeout (parallel flash only) # Watchdog force timeout (parallel flash only)
#irq 0x71 = 0x1 # irq 0x71 = 0x1
# No WDT interrupt # No WDT interrupt
irq 0x72 = 0x0 irq 0x72 = 0x0
# GPIO pin set 1 disable internal pullup # GPIO pin set 1 disable internal pullup
@ -72,23 +75,23 @@ device pci_domain 0 on
# GPIO pin set 5 enable internal pullup # GPIO pin set 5 enable internal pullup
irq 0xbc = 0x01 irq 0xbc = 0x01
# SIO pin set 1 alternate function # SIO pin set 1 alternate function
#irq 0xc0 = 0x0 # irq 0xc0 = 0x0
# SIO pin set 2 mixed function # SIO pin set 2 mixed function
irq 0xc1 = 0x43 irq 0xc1 = 0x43
# SIO pin set 3 mixed function # SIO pin set 3 mixed function
irq 0xc2 = 0x20 irq 0xc2 = 0x20
# SIO pin set 4 alternate function # SIO pin set 4 alternate function
#irq 0xc3 = 0x0 # irq 0xc3 = 0x0
# SIO pin set 1 input mode # SIO pin set 1 input mode
#irq 0xc8 = 0x0 # irq 0xc8 = 0x0
# SIO pin set 2 input mode # SIO pin set 2 input mode
irq 0xc9 = 0x0 irq 0xc9 = 0x0
# SIO pin set 4 input mode # SIO pin set 4 input mode
#irq 0xcb = 0x0 # irq 0xcb = 0x0
# Generate SMI# on EC IRQ # Generate SMI# on EC IRQ
#irq 0xf0 = 0x10 # irq 0xf0 = 0x10
# SMI# level trigger # SMI# level trigger
#irq 0xf1 = 0x40 # irq 0xf1 = 0x40
# HWMON alert beep pin location # HWMON alert beep pin location
irq 0xf6 = 0x28 irq 0xf6 = 0x28
end end
@ -96,38 +99,38 @@ device pci_domain 0 on
io 0x60 = 0x300 io 0x60 = 0x300
irq 0x70 = 10 irq 0x70 = 10
end end
device pnp 2e.9 off # GAME device pnp 2e.9 off # Game port
io 0x60 = 0x220 io 0x60 = 0x220
end end
device pnp 2e.a off end # CIR device pnp 2e.a off end # Consumer IR
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 1-0-0 chip drivers/generic/generic # DIMM 1-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 1-0-1 chip drivers/generic/generic # DIMM 1-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 1-1-0 chip drivers/generic/generic # DIMM 1-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 1-1-1 chip drivers/generic/generic # DIMM 1-1-1
device i2c 57 on end device i2c 57 on end
end end
end # SM end
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE device pci 4.0 on end # IDE
@ -147,28 +150,28 @@ device pci_domain 0 on
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end #device pci 18.0 end
device pci 18.0 on end # Link 1 device pci 18.0 on end # Link 1
device pci 18.0 on end device pci 18.0 on end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
end # mc0 end
end # PCI domain end
# chip drivers/generic/debug
# chip drivers/generic/debug # device pnp 0.0 off end # chip name
# device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all
# device pnp 0.1 on end # pci_regs_all # device pnp 0.2 on end # mem
# device pnp 0.2 on end # mem # device pnp 0.3 off end # cpuid
# device pnp 0.3 off end # cpuid # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.5 off end # dual core msr
# device pnp 0.5 off end # dual core msr # device pnp 0.6 off end # cache size
# device pnp 0.6 off end # cache size # device pnp 0.7 off end # tsc
# device pnp 0.7 off end # tsc # device pnp 0.8 off end # io
# device pnp 0.8 off end # io # device pnp 0.9 off end # io
# device pnp 0.9 off end # io # end
# end end
end #root_complex

17
src/mainboard/msi/ms7135/devicetree.cb
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@ -1,14 +1,13 @@
chip northbridge/amd/amdk8/root_complex # Root complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on # APIC cluster device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_754 # Socket 754 CPU chip cpu/amd/socket_754 # CPU socket
device lapic 0 on end # APIC device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on # PCI domain device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 # mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on # Northbridge device pci 18.0 on # Link 0 == LDT 0
# Devices on link 0, link 0 == LDT 0
chip southbridge/nvidia/ck804 # Southbridge chip southbridge/nvidia/ck804 # Southbridge
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
@ -52,14 +51,14 @@ chip northbridge/amd/amdk8/root_complex # Root complex
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # Onboard audio (ACI) device pci 4.0 on end # Onboard audio (ACI)
device pci 4.1 off end # Onboard modem (MCI) -- not wired out device pci 4.1 off end # Onboard modem (MCI), N/A
device pci 6.0 on end # IDE device pci 6.0 on end # IDE
device pci 7.0 on end # SATA 1 device pci 7.0 on end # SATA 1
device pci 8.0 on end # SATA 0 device pci 8.0 on end # SATA 0
device pci 9.0 on end # PCI device pci 9.0 on end # PCI
device pci a.0 on end # NIC device pci a.0 on end # NIC
device pci b.0 off end # PCI E 3 -- not wired out device pci b.0 off end # PCI E 3 (N/A)
device pci c.0 off end # PCI E 2 -- not wired out device pci c.0 off end # PCI E 2 (N/A)
device pci d.0 on end # PCI E 1 device pci d.0 on end # PCI E 1
device pci e.0 on end # PCI E 0 device pci e.0 on end # PCI E 0
register "ide0_enable" = "1" register "ide0_enable" = "1"

56
src/mainboard/msi/ms7260/devicetree.cb
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@ -1,13 +1,12 @@
chip northbridge/amd/amdk8/root_complex # Root complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on # APIC cluster device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_AM2 # CPU chip cpu/amd/socket_AM2 # CPU socket
device lapic 0 on end # APIC device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on # PCI domain device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 # Northbridge / mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on device pci 18.0 on # Link 0 == LDT 0
# Devices on link 0, link 0 == LDT 0
chip southbridge/nvidia/mcp55 # Southbridge chip southbridge/nvidia/mcp55 # Southbridge
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
@ -83,19 +82,19 @@ chip northbridge/amd/amdk8/root_complex # Root complex
end end
# TODO: Check if the stuff below is correct / needed. # TODO: Check if the stuff below is correct / needed.
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
# PCI device SMBus address will depend on addon PCI device, # PCI device SMBus address will
# do we need to scan_smbus_bus? # depend on addon PCI device, do
# we need to scan_smbus_bus?
# chip drivers/generic/generic # PCIXA Slot1 # chip drivers/generic/generic # PCIXA slot 1
# device i2c 50 on end # device i2c 50 on end
# end # end
# chip drivers/generic/generic # PCIXB Slot1 # chip drivers/generic/generic # PCIXB slot 1
# device i2c 51 on end # device i2c 51 on end
# end # end
# chip drivers/generic/generic # PCIXB Slot2 # chip drivers/generic/generic # PCIXB slot 2
# device i2c 52 on end # device i2c 52 on end
# end # end
# chip drivers/generic/generic # PCI Slot1 # chip drivers/generic/generic # PCI slot 1
# device i2c 53 on end # device i2c 53 on end
# end # end
# chip drivers/generic/generic # Master MCP55 PCI-E # chip drivers/generic/generic # Master MCP55 PCI-E
@ -128,7 +127,8 @@ chip northbridge/amd/amdk8/root_complex # Root complex
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
# TODO: Check the two lines below. # TODO: Check the two lines below.
register "mac_eeprom_smbus" = "3" # 1: SMBus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end end
@ -139,19 +139,17 @@ chip northbridge/amd/amdk8/root_complex # Root complex
device pci 18.3 on end device pci 18.3 on end
end end
end end
# TODO
# TODO # chip drivers/generic/debug
# chip drivers/generic/debug # device pnp 0.0 off end # chip name
# device pnp 0.0 off end # chip name # device pnp 0.1 on end # pci_regs_all
# device pnp 0.1 on end # pci_regs_all # device pnp 0.2 on end # mem
# device pnp 0.2 on end # mem # device pnp 0.3 off end # cpuid
# device pnp 0.3 off end # cpuid # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.5 off end # dual core msr
# device pnp 0.5 off end # dual core msr # device pnp 0.6 off end # cache size
# device pnp 0.6 off end # cache size # device pnp 0.7 off end # tsc
# device pnp 0.7 off end # tsc # device pnp 0.8 off end # io
# device pnp 0.8 off end # io # device pnp 0.9 off end # io
# device pnp 0.9 off end # io # end
# end
end end

127
src/mainboard/msi/ms9282/devicetree.cb
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@ -1,24 +1,22 @@
chip northbridge/amd/amdk8/root_complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_F chip cpu/amd/socket_F # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on # PCI domain
device pci_domain 0 on chip northbridge/amd/amdk8 # Northbridge / RAM controller
chip northbridge/amd/amdk8 #mc0 device pci 18.0 on # Link 0 == LDT 0
device pci 18.0 on # northbridge chip southbridge/nvidia/mcp55 # Southbridge
# devices on link 0, link 0 == LDT 0
chip southbridge/nvidia/mcp55
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627ehg chip superio/winbond/w83627ehg # Super I/O
device pnp 2e.0 on # Floppy device pnp 2e.0 on # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 off # Parallel Port device pnp 2e.1 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -30,152 +28,149 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
irq 0x72 = 12 irq 0x72 = 12
end end
device pnp 2e.6 off # SERIAL_FALSH device pnp 2e.6 off # Serial flash
io 0x60 = 0x100 io 0x60 = 0x100
end end
device pnp 2e.7 off # GAME_MIDI_GIPO1 device pnp 2e.7 off # Game port, MIDI, GPIO1
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.8 off end # WDTO_PLED device pnp 2e.8 off end # WDTO PLED
device pnp 2e.9 off end # GPIO2_GPIO3_GPIO4_GPIO5 device pnp 2e.9 off end # GPIO2, GPIO3, GPIO4, GPIO5
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/i2c/i2cmux2 # pca9554 smbus mux chip drivers/i2c/i2cmux2 # PCA9554 SMBus mux
device i2c 70 on #0 pca9554 1 device i2c 70 on # 0 pca9554 1
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 57 on end device i2c 57 on end
end end
end end
device i2c 70 on #0 pca9554 2 device i2c 70 on # 0 pca9554 2
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 57 on end device i2c 57 on end
end end
end end
end end
end end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
chip drivers/i2c/i2cmux2 # pca9554 smbus mux chip drivers/i2c/i2cmux2 # pca9554 SMBus mux
device i2c 72 on #pca9554 channle1 device i2c 72 on # PCA9554 channel 1
chip drivers/i2c/adm1027 #HWM ADT7476 1 chip drivers/i2c/adm1027 # HWM ADT7476 1
device i2c 2e on end device i2c 2e on end
end end
end end
device i2c 72 on #pca9545 channel 2 device i2c 72 on # PCA9545 channel 2
chip drivers/i2c/adm1027 #HWM ADT7463 chip drivers/i2c/adm1027 # HWM ADT7463
device i2c 2e on end device i2c 2e on end
end end
end end
device i2c 72 on end #pca9545 channel 3 device i2c 72 on end # PCA9545 channel 3
device i2c 72 on #pca9545 channel 4 device i2c 72 on # PCA9545 channel 4
chip drivers/i2c/adm1027 #HWM ADT7476 2 chip drivers/i2c/adm1027 # HWM ADT7476 2
device i2c 2e on end device i2c 2e on end
end end
end end
end end
end end
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE device pci 4.0 on end # IDE
device pci 5.0 on end # SATA 0 device pci 5.0 on end # SATA 0
device pci 5.1 on end # SATA 1 device pci 5.1 on end # SATA 1
device pci 5.2 on end # SATA 2 device pci 5.2 on end # SATA 2
device pci 6.0 on #P2P device pci 6.0 on # P2P
device pci 4.0 on end device pci 4.0 on end
end # P2P end
device pci 7.0 on end # reserve device pci 7.0 on end # reserve
device pci 8.0 on end # MAC0 device pci 8.0 on end # MAC0
device pci 9.0 on end # MAC1 device pci 9.0 on end # MAC1
device pci a.0 on device pci a.0 on
device pci 0.0 on device pci 0.0 on
device pci 4.0 on end #pci_E lan1 device pci 4.0 on end # PCI-E LAN1
device pci 4.1 on end #pci_E lan2 device pci 4.1 on end # PCI-E LAN2
end end
end # 0x376 end # 0x376
device pci b.0 on end # PCI E 0x374 device pci b.0 on end # PCI E 0x374
device pci c.0 on end device pci c.0 on end
device pci d.0 on #SAS device pci d.0 on # SAS
device pci 0.0 on end device pci 0.0 on end
end # PCI E 1 0x378 end # PCI E 1 0x378
device pci e.0 on end # PCI E 0 0x375 device pci e.0 on end # PCI E 0 0x375
device pci f.0 on end #PCI E 0x377 pci_E slot device pci f.0 on end # PCI E 0x377, PCI-E slot
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "ide1_enable" = "1" register "ide1_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
end end
end # device pci 18.0 end
device pci 18.0 on end # Link 1 device pci 18.0 on end # Link 1
device pci 18.0 on end device pci 18.0 on end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
end #mc0 end
end
end # pci_domain # chip drivers/generic/debug
# device pnp 0.0 off end
# chip drivers/generic/debug # device pnp 0.1 off end
# device pnp 0.0 off end # device pnp 0.2 off end
# device pnp 0.1 off end # device pnp 0.3 off end
# device pnp 0.2 off end # device pnp 0.4 off end
# device pnp 0.3 off end # device pnp 0.5 on end
# device pnp 0.4 off end # end
# device pnp 0.5 on end end
# end
end # root_complex

135
src/mainboard/msi/ms9652_fam10/devicetree.cb
View File

@ -21,25 +21,25 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
## ##
chip northbridge/amd/amdfam10/root_complex chip northbridge/amd/amdfam10/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_F_1207 chip cpu/amd/socket_F_1207 # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdfam10 #mc0 chip northbridge/amd/amdfam10 # Northbridge / RAM controller
device pci 18.0 on # SB on HT link 0.0 device pci 18.0 on # Link 0
chip southbridge/nvidia/mcp55 chip southbridge/nvidia/mcp55 # Southbridge
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627ehg chip superio/winbond/w83627ehg # Super I/O
device pnp 2e.0 on # Floppy device pnp 2e.0 on # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 off # Parallel Port device pnp 2e.1 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -51,24 +51,24 @@ chip northbridge/amd/amdfam10/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
irq 0x72 = 12 irq 0x72 = 12
end end
device pnp 2e.6 off # SERIAL_FLASH device pnp 2e.6 off # Serial flash
io 0x60 = 0x100 io 0x60 = 0x100
end end
device pnp 2e.7 off # GAME_MIDI_GIPO1 device pnp 2e.7 off # Game port, MIDI, GPIO1
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.8 off end # WDTO_PLED device pnp 2e.8 off end # WDTO PLED
device pnp 2e.9 off end # GPIO2_GPIO3_GPIO4_GPIO5 device pnp 2e.9 off end # GPIO2, GPIO3, GPIO4, GPIO5
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
@ -82,55 +82,57 @@ chip northbridge/amd/amdfam10/root_complex
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 1-0-0 chip drivers/generic/generic # DIMM 1-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 1-0-1 chip drivers/generic/generic # DIMM 1-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 1-1-0 chip drivers/generic/generic # DIMM 1-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 1-1-1 chip drivers/generic/generic # DIMM 1-1-1
device i2c 57 on end device i2c 57 on end
end end
end # SM end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? # PCI device SMBus address will
# chip drivers/generic/generic #PCIXA Slot1 # depend on addon PCI device, do
# device i2c 50 on end # we need to scan_smbus_bus?
# end # chip drivers/generic/generic # PCIXA slot 1
# chip drivers/generic/generic #PCIXB Slot1 # device i2c 50 on end
# device i2c 51 on end # end
# end # chip drivers/generic/generic # PCIXB slot 1
# chip drivers/generic/generic #PCIXB Slot2 # device i2c 51 on end
# device i2c 52 on end # end
# end # chip drivers/generic/generic # PCIXB slot 2
# chip drivers/generic/generic #PCI Slot1 # device i2c 52 on end
# device i2c 53 on end # end
# end # chip drivers/generic/generic # PCI slot 1
# chip drivers/generic/generic #Master MCP55 PCI-E # device i2c 53 on end
# device i2c 54 on end # end
# end # chip drivers/generic/generic # Master MCP55 PCI-E
# chip drivers/generic/generic #Slave MCP55 PCI-E # device i2c 54 on end
# device i2c 55 on end # end
# end # chip drivers/generic/generic # Slave MCP55 PCI-E
# chip drivers/generic/generic #MAC EEPROM # device i2c 55 on end
# device i2c 51 on end # end
# end # chip drivers/generic/generic # MAC EEPROM
end # SM # device i2c 51 on end
# end
end
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE device pci 4.0 on end # IDE
@ -143,30 +145,29 @@ chip northbridge/amd/amdfam10/root_complex
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.0 on end # HT 1.0 device pci 18.0 on end # HT 1.0
device pci 18.0 on end # HT 2.0 device pci 18.0 on end # HT 2.0
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
device pci 18.4 on end device pci 18.4 on end
end # mc0 end
end
end # PCI domain # chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# chip drivers/generic/debug # device pnp 0.1 on end # pci_regs_all
# device pnp 0.0 off end # chip name # device pnp 0.2 on end # mem
# device pnp 0.1 on end # pci_regs_all # device pnp 0.3 off end # cpuid
# device pnp 0.2 on end # mem # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.3 off end # cpuid # device pnp 0.5 off end # dual core msr
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.6 off end # cache size
# device pnp 0.5 off end # dual core msr # device pnp 0.7 off end # tsc
# device pnp 0.6 off end # cache size # device pnp 0.8 off end # io
# device pnp 0.7 off end # tsc # device pnp 0.9 off end # io
# device pnp 0.8 off end # io # end
# device pnp 0.9 off end # io end
# end
end #root_complex

141
src/mainboard/nvidia/l1_2pvv/devicetree.cb
View File

@ -1,23 +1,22 @@
chip northbridge/amd/amdk8/root_complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_F chip cpu/amd/socket_F # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 #mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on device pci 18.0 on # Link 0 == LDT 0
# devices on link 0, link 0 == LDT 0 chip southbridge/nvidia/mcp55 # Southbridge
chip southbridge/nvidia/mcp55
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627ehg chip superio/winbond/w83627ehg # Super I/O
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 off # Parallel Port device pnp 2e.1 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -29,7 +28,7 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
@ -38,71 +37,72 @@ chip northbridge/amd/amdk8/root_complex
device pnp 2e.6 off # SFI device pnp 2e.6 off # SFI
io 0x62 = 0x100 io 0x62 = 0x100
end end
device pnp 2e.7 off # GPIO_GAME_MIDI device pnp 2e.7 off # GPIO, Game port, MIDI
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.8 off end # WDTO_PLED device pnp 2e.8 off end # WDTO PLED
device pnp 2e.9 off end # GPIO_SUSLED device pnp 2e.9 off end # GPIO SUSLED
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 1-0-0 chip drivers/generic/generic # DIMM 1-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 1-0-1 chip drivers/generic/generic # DIMM 1-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 1-1-0 chip drivers/generic/generic # DIMM 1-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 1-1-1 chip drivers/generic/generic # DIMM 1-1-1
device i2c 57 on end device i2c 57 on end
end end
end # SM end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? # PCI device SMBus address will
# chip drivers/generic/generic #PCIXA Slot1 # depend on addon PCI device, do
# device i2c 50 on end # we need to scan_smbus_bus?
# end # chip drivers/generic/generic # PCIXA slot 1
# chip drivers/generic/generic #PCIXB Slot1 # device i2c 50 on end
# device i2c 51 on end # end
# end # chip drivers/generic/generic # PCIXB slot 1
# chip drivers/generic/generic #PCIXB Slot2 # device i2c 51 on end
# device i2c 52 on end # end
# end # chip drivers/generic/generic # PCIXB slot 2
# chip drivers/generic/generic #PCI Slot1 # device i2c 52 on end
# device i2c 53 on end # end
# end # chip drivers/generic/generic # PCI slot 1
# chip drivers/generic/generic #Master MCP55 PCI-E # device i2c 53 on end
# device i2c 54 on end # end
# end # chip drivers/generic/generic # Master MCP55 PCI-E
# chip drivers/generic/generic #Slave MCP55 PCI-E # device i2c 54 on end
# device i2c 55 on end # end
# end # chip drivers/generic/generic # Slave MCP55 PCI-E
chip drivers/generic/generic #MAC EEPROM # device i2c 55 on end
# end
chip drivers/generic/generic # MAC EEPROM
device i2c 51 on end device i2c 51 on end
end end
end
end # SM
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE device pci 4.0 on end # IDE
@ -122,14 +122,14 @@ chip northbridge/amd/amdk8/root_complex
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.0 on end # Link 1 device pci 18.0 on end # Link 1
device pci 18.0 on device pci 18.0 on # Link 2 == LDT 2
# devices on link 2, link 2 == LDT 2 chip southbridge/nvidia/mcp55 # Southbridge
chip southbridge/nvidia/mcp55
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on end # LPC device pci 1.0 on end # LPC
device pci 1.1 on end # SM 0 device pci 1.1 on end # SM 0
@ -152,27 +152,26 @@ chip northbridge/amd/amdk8/root_complex
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
end # mc0 end
end
end # PCI domain # chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# chip drivers/generic/debug # device pnp 0.1 on end # pci_regs_all
# device pnp 0.0 off end # chip name # device pnp 0.2 on end # mem
# device pnp 0.1 on end # pci_regs_all # device pnp 0.3 off end # cpuid
# device pnp 0.2 on end # mem # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.3 off end # cpuid # device pnp 0.5 off end # dual core msr
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.6 off end # cache size
# device pnp 0.5 off end # dual core msr # device pnp 0.7 off end # tsc
# device pnp 0.6 off end # cache size # device pnp 0.8 off end # io
# device pnp 0.7 off end # tsc # device pnp 0.9 off end # io
# device pnp 0.8 off end # io # end
# device pnp 0.9 off end # io end
# end
end #root_complex

116
src/mainboard/sunw/ultra40/devicetree.cb
View File

@ -1,24 +1,23 @@
chip northbridge/amd/amdk8/root_complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_940 chip cpu/amd/socket_940 # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 #mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on end # link 0 device pci 18.0 on end
device pci 18.0 on # link1 device pci 18.0 on # Link 0 == LDT 0
# devices on link 0, link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge
chip southbridge/nvidia/ck804
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/smsc/lpc47m10x chip superio/smsc/lpc47m10x # Super I/O
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.3 off # Parallel Port device pnp 2e.3 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -30,7 +29,7 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.7 off # Keyboard device pnp 2e.7 off # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
@ -39,56 +38,57 @@ chip northbridge/amd/amdk8/root_complex
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 1-0-0 chip drivers/generic/generic # DIMM 1-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 1-0-1 chip drivers/generic/generic # DIMM 1-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 1-1-0 chip drivers/generic/generic # DIMM 1-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 1-1-1 chip drivers/generic/generic # DIMM 1-1-1
device i2c 57 on end device i2c 57 on end
end end
end # SM end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? # PCI device SMBus address will
# chip drivers/generic/generic #PCIXA Slot1 # depend on addon PCI device, do
# device i2c 50 on end # we need to scan_smbus_bus?
# end # chip drivers/generic/generic # PCIXA slot 1
# chip drivers/generic/generic #PCIXB Slot1 # device i2c 50 on end
# device i2c 51 on end # end
# end # chip drivers/generic/generic # PCIXB slot 1
# chip drivers/generic/generic #PCIXB Slot2 # device i2c 51 on end
# device i2c 52 on end # end
# end # chip drivers/generic/generic # PCIXB slot 2
# chip drivers/generic/generic #PCI Slot1 # device i2c 52 on end
# device i2c 53 on end # end
# end # chip drivers/generic/generic # PCI slot 1
# chip drivers/generic/generic #Master CK804 PCI-E # device i2c 53 on end
# device i2c 54 on end # end
# end # chip drivers/generic/generic # Master CK804 PCI-E
# chip drivers/generic/generic #Slave CK804 PCI-E # device i2c 54 on end
# device i2c 55 on end # end
# end # chip drivers/generic/generic # Slave CK804 PCI-E
chip drivers/generic/generic #MAC EEPROM # device i2c 55 on end
# end
chip drivers/generic/generic # MAC EEPROM
device i2c 51 on end device i2c 51 on end
end end
end
end # SM
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # ACI device pci 4.0 on end # ACI
@ -106,21 +106,20 @@ chip northbridge/amd/amdk8/root_complex
register "ide1_enable" = "1" register "ide1_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.0 on end # link 2 device pci 18.0 on end # Link 2
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
end # mc0 end
chip northbridge/amd/amdk8 # Northbridge / RAM controller
chip northbridge/amd/amdk8 device pci 19.0 on end # Link 0
device pci 19.0 on end # link 0 device pci 19.0 on # Link 1 == LDT 1
device pci 19.0 on chip southbridge/nvidia/ck804 # Southbridge
# devices on link 1, link 1 == LDT 1
chip southbridge/nvidia/ck804
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on end # LPC device pci 1.0 on end # LPC
device pci 1.1 off end # SM device pci 1.1 off end # SM
@ -137,16 +136,15 @@ chip northbridge/amd/amdk8/root_complex
device pci c.0 off end # PCI E 2 device pci c.0 off end # PCI E 2
device pci d.0 off end # PCI E 1 device pci d.0 off end # PCI E 1
device pci e.0 on end # PCI E 0 device pci e.0 on end # PCI E 0
# 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3" register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 19.0 end
device pci 19.0 on end device pci 19.0 on end
device pci 19.1 on end device pci 19.1 on end
device pci 19.2 on end device pci 19.2 on end
device pci 19.3 on end device pci 19.3 on end
end end
end # PCI domain end
end
end #root_complex

124
src/mainboard/supermicro/h8dme/devicetree.cb
View File

@ -1,25 +1,24 @@
chip northbridge/amd/amdk8/root_complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_F chip cpu/amd/socket_F # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 #mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on device pci 18.0 on # Link 0 == LDT 0
# devices on link 0, link 0 == LDT 0 chip southbridge/nvidia/mcp55 # Southbridge
chip southbridge/nvidia/mcp55
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627hf chip superio/winbond/w83627hf # Super I/O
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 off # Parallel Port device pnp 2e.1 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -31,7 +30,7 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
@ -40,15 +39,15 @@ chip northbridge/amd/amdk8/root_complex
device pnp 2e.6 off # SFI device pnp 2e.6 off # SFI
io 0x62 = 0x100 io 0x62 = 0x100
end end
device pnp 2e.7 off # GPIO_GAME_MIDI device pnp 2e.7 off # GPIO, game port, MIDI
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.8 off end # WDTO_PLED device pnp 2e.8 off end # WDTO PLED
device pnp 2e.9 off end # GPIO_SUSLED device pnp 2e.9 off end # GPIO SUSLED
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
@ -59,32 +58,33 @@ chip northbridge/amd/amdk8/root_complex
device i2c 48 off end device i2c 48 off end
device i2c 49 off end device i2c 49 off end
end end
end # SM end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? # PCI device SMBus address will
# chip drivers/generic/generic #PCIXA Slot1 # depend on addon PCI device, do
# device i2c 50 on end # we need to scan_smbus_bus?
# end # chip drivers/generic/generic # PCIXA slot 1
# chip drivers/generic/generic #PCIXB Slot1 # device i2c 50 on end
# device i2c 51 on end # end
# end # chip drivers/generic/generic # PCIXB slot 1
# chip drivers/generic/generic #PCIXB Slot2 # device i2c 51 on end
# device i2c 52 on end # end
# end # chip drivers/generic/generic # PCIXB slot 2
# chip drivers/generic/generic #PCI Slot1 # device i2c 52 on end
# device i2c 53 on end # end
# end # chip drivers/generic/generic # PCI slot 1
# chip drivers/generic/generic #Master MCP55 PCI-E # device i2c 53 on end
# device i2c 54 on end # end
# end # chip drivers/generic/generic # Master MCP55 PCI-E
# chip drivers/generic/generic #Slave MCP55 PCI-E # device i2c 54 on end
# device i2c 55 on end # end
# end # chip drivers/generic/generic # Slave MCP55 PCI-E
chip drivers/generic/generic #MAC EEPROM # device i2c 55 on end
# end
chip drivers/generic/generic # MAC EEPROM
device i2c 51 on end device i2c 51 on end
end end
end
end # SM
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE device pci 4.0 on end # IDE
@ -98,11 +98,10 @@ chip northbridge/amd/amdk8/root_complex
device pci 8.0 on end # NIC device pci 8.0 on end # NIC
device pci 9.0 on end # NIC device pci 9.0 on end # NIC
device pci a.0 on # PCI E 5 device pci a.0 on # PCI E 5
device pci 0.0 on #nec pci-x device pci 0.0 on end # NEC PCI-X
end device pci 0.1 on # NEC PCI-X
device pci 0.1 on #nec pci-x device pci 4.0 on end # SCSI
device pci 4.0 on end #scsi device pci 4.1 on end # SCSI
device pci 4.1 on end #scsi
end end
end end
device pci b.0 on end # PCI E 4 device pci b.0 on end # PCI E 4
@ -113,27 +112,26 @@ chip northbridge/amd/amdk8/root_complex
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
end # mc0 end
end
end # PCI domain # chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# chip drivers/generic/debug # device pnp 0.1 on end # pci_regs_all
# device pnp 0.0 off end # chip name # device pnp 0.2 off end # mem
# device pnp 0.1 on end # pci_regs_all # device pnp 0.3 off end # cpuid
# device pnp 0.2 off end # mem # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.3 off end # cpuid # device pnp 0.5 off end # dual core msr
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.6 off end # cache size
# device pnp 0.5 off end # dual core msr # device pnp 0.7 off end # tsc
# device pnp 0.6 off end # cache size # device pnp 0.8 off end # io
# device pnp 0.7 off end # tsc # device pnp 0.9 on end # io
# device pnp 0.8 off end # io # end
# device pnp 0.9 on end # io end
# end
end #root_complex

140
src/mainboard/supermicro/h8dmr/devicetree.cb
View File

@ -1,25 +1,24 @@
chip northbridge/amd/amdk8/root_complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_F chip cpu/amd/socket_F # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 #mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on device pci 18.0 on # Link 0 == LDT 0
# devices on link 0, link 0 == LDT 0 chip southbridge/nvidia/mcp55 # Southbridge
chip southbridge/nvidia/mcp55
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627hf chip superio/winbond/w83627hf # Super I/O
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 off # Parallel Port device pnp 2e.1 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -31,7 +30,7 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
@ -40,71 +39,72 @@ chip northbridge/amd/amdk8/root_complex
device pnp 2e.6 off # SFI device pnp 2e.6 off # SFI
io 0x62 = 0x100 io 0x62 = 0x100
end end
device pnp 2e.7 off # GPIO_GAME_MIDI device pnp 2e.7 off # GPIO, game port, MIDI
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.8 off end # WDTO_PLED device pnp 2e.8 off end # WDTO PLED
device pnp 2e.9 off end # GPIO_SUSLED device pnp 2e.9 off end # GPIO SUSLED
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 1-0-0 chip drivers/generic/generic # DIMM 1-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 1-0-1 chip drivers/generic/generic # DIMM 1-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 1-1-0 chip drivers/generic/generic # DIMM 1-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 1-1-1 chip drivers/generic/generic # DIMM 1-1-1
device i2c 57 on end device i2c 57 on end
end end
end # SM end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? # PCI device SMBus address will
# chip drivers/generic/generic #PCIXA Slot1 # depend on addon PCI device, do
# device i2c 50 on end # we need to scan_smbus_bus?
# end # chip drivers/generic/generic # PCIXA slot 1
# chip drivers/generic/generic #PCIXB Slot1 # device i2c 50 on end
# device i2c 51 on end # end
# end # chip drivers/generic/generic # PCIXB slot 1
# chip drivers/generic/generic #PCIXB Slot2 # device i2c 51 on end
# device i2c 52 on end # end
# end # chip drivers/generic/generic # PCIXB slot 2
# chip drivers/generic/generic #PCI Slot1 # device i2c 52 on end
# device i2c 53 on end # end
# end # chip drivers/generic/generic # PCI slot 1
# chip drivers/generic/generic #Master MCP55 PCI-E # device i2c 53 on end
# device i2c 54 on end # end
# end # chip drivers/generic/generic # Master MCP55 PCI-E
# chip drivers/generic/generic #Slave MCP55 PCI-E # device i2c 54 on end
# device i2c 55 on end # end
# end # chip drivers/generic/generic # Slave MCP55 PCI-E
chip drivers/generic/generic #MAC EEPROM # device i2c 55 on end
# end
chip drivers/generic/generic # MAC EEPROM
device i2c 51 on end device i2c 51 on end
end end
end
end # SM
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE device pci 4.0 on end # IDE
@ -118,11 +118,10 @@ chip northbridge/amd/amdk8/root_complex
device pci 8.0 on end # NIC device pci 8.0 on end # NIC
device pci 9.0 on end # NIC device pci 9.0 on end # NIC
device pci a.0 on # PCI E 5 device pci a.0 on # PCI E 5
device pci 0.0 on #nec pci-x device pci 0.0 on end # NEC PCI-X
end device pci 0.1 on # NEC PCI-X
device pci 0.1 on #nec pci-x device pci 4.0 on end # SCSI
device pci 4.0 on end #scsi device pci 4.1 on end # SCSI
device pci 4.1 on end #scsi
end end
end end
device pci b.0 on end # PCI E 4 device pci b.0 on end # PCI E 4
@ -133,27 +132,26 @@ chip northbridge/amd/amdk8/root_complex
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
end # mc0 end
end
end # PCI domain # chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# chip drivers/generic/debug # device pnp 0.1 on end # pci_regs_all
# device pnp 0.0 off end # chip name # device pnp 0.2 off end # mem
# device pnp 0.1 on end # pci_regs_all # device pnp 0.3 off end # cpuid
# device pnp 0.2 off end # mem # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.3 off end # cpuid # device pnp 0.5 off end # dual core msr
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.6 off end # cache size
# device pnp 0.5 off end # dual core msr # device pnp 0.7 off end # tsc
# device pnp 0.6 off end # cache size # device pnp 0.8 off end # io
# device pnp 0.7 off end # tsc # device pnp 0.9 on end # io
# device pnp 0.8 off end # io # end
# device pnp 0.9 on end # io end
# end
end #root_complex

140
src/mainboard/supermicro/h8dmr_fam10/devicetree.cb
View File

@ -1,25 +1,24 @@
chip northbridge/amd/amdfam10/root_complex chip northbridge/amd/amdfam10/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_F_1207 chip cpu/amd/socket_F_1207 # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdfam10 #mc0 chip northbridge/amd/amdfam10 # Northbridge / RAM controller
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on device pci 18.0 on # SB on link 2.0
# SB on link 2.0 chip southbridge/nvidia/mcp55 # Southbridge
chip southbridge/nvidia/mcp55
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627hf chip superio/winbond/w83627hf # Super I/O
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 off # Parallel Port device pnp 2e.1 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -31,7 +30,7 @@ chip northbridge/amd/amdfam10/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
@ -40,71 +39,72 @@ chip northbridge/amd/amdfam10/root_complex
device pnp 2e.6 off # SFI device pnp 2e.6 off # SFI
io 0x62 = 0x100 io 0x62 = 0x100
end end
device pnp 2e.7 off # GPIO_GAME_MIDI device pnp 2e.7 off # GPIO, game port, MIDI
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.8 off end # WDTO_PLED device pnp 2e.8 off end # WDTO PLED
device pnp 2e.9 off end # GPIO_SUSLED device pnp 2e.9 off end # GPIO SUSLED
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 1-0-0 chip drivers/generic/generic # DIMM 1-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 1-0-1 chip drivers/generic/generic # DIMM 1-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 1-1-0 chip drivers/generic/generic # DIMM 1-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 1-1-1 chip drivers/generic/generic # DIMM 1-1-1
device i2c 57 on end device i2c 57 on end
end end
end # SM end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? # PCI device SMBus address will
# chip drivers/generic/generic #PCIXA Slot1 # depend on addon PCI device, do
# device i2c 50 on end # we need to scan_smbus_bus?
# end # chip drivers/generic/generic # PCIXA slot 1
# chip drivers/generic/generic #PCIXB Slot1 # device i2c 50 on end
# device i2c 51 on end # end
# end # chip drivers/generic/generic # PCIXB slot 1
# chip drivers/generic/generic #PCIXB Slot2 # device i2c 51 on end
# device i2c 52 on end # end
# end # chip drivers/generic/generic # PCIXB slot 2
# chip drivers/generic/generic #PCI Slot1 # device i2c 52 on end
# device i2c 53 on end # end
# end # chip drivers/generic/generic # PCI slot 1
# chip drivers/generic/generic #Master MCP55 PCI-E # device i2c 53 on end
# device i2c 54 on end # end
# end # chip drivers/generic/generic # Master MCP55 PCI-E
# chip drivers/generic/generic #Slave MCP55 PCI-E # device i2c 54 on end
# device i2c 55 on end # end
# end # chip drivers/generic/generic # Slave MCP55 PCI-E
chip drivers/generic/generic #MAC EEPROM # device i2c 55 on end
# end
chip drivers/generic/generic # MAC EEPROM
device i2c 51 on end device i2c 51 on end
end end
end
end # SM
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE device pci 4.0 on end # IDE
@ -118,11 +118,10 @@ chip northbridge/amd/amdfam10/root_complex
device pci 8.0 on end # NIC device pci 8.0 on end # NIC
device pci 9.0 on end # NIC device pci 9.0 on end # NIC
device pci a.0 on # PCI E 5 device pci a.0 on # PCI E 5
device pci 0.0 on #nec pci-x device pci 0.0 on end # NEC PCI-X
end device pci 0.1 on # NEC PCI-X
device pci 0.1 on #nec pci-x device pci 4.0 on end # SCSI
device pci 4.0 on end #scsi device pci 4.1 on end # SCSI
device pci 4.1 on end #scsi
end end
end end
device pci b.0 on end # PCI E 4 device pci b.0 on end # PCI E 4
@ -133,10 +132,11 @@ chip northbridge/amd/amdfam10/root_complex
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
@ -146,20 +146,18 @@ chip northbridge/amd/amdfam10/root_complex
device pci 19.2 on end device pci 19.2 on end
device pci 19.3 on end device pci 19.3 on end
device pci 19.4 on end device pci 19.4 on end
end # mc0 end
end
end # PCI domain # chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# chip drivers/generic/debug # device pnp 0.1 on end # pci_regs_all
# device pnp 0.0 off end # chip name # device pnp 0.2 off end # mem
# device pnp 0.1 on end # pci_regs_all # device pnp 0.3 off end # cpuid
# device pnp 0.2 off end # mem # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.3 off end # cpuid # device pnp 0.5 off end # dual core msr
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.6 off end # cache size
# device pnp 0.5 off end # dual core msr # device pnp 0.7 off end # tsc
# device pnp 0.6 off end # cache size # device pnp 0.8 off end # io
# device pnp 0.7 off end # tsc # device pnp 0.9 on end # io
# device pnp 0.8 off end # io # end
# device pnp 0.9 on end # io end
# end
end #root_complex

82
src/mainboard/supermicro/h8qme_fam10/devicetree.cb
View File

@ -1,25 +1,24 @@
chip northbridge/amd/amdfam10/root_complex chip northbridge/amd/amdfam10/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_F_1207 chip cpu/amd/socket_F_1207 # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdfam10 #mc0 chip northbridge/amd/amdfam10 # Northbridge / RAM controller
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on device pci 18.0 on # SB on link 2
# SB on link 2.0 chip southbridge/nvidia/mcp55 # Southbridge
chip southbridge/nvidia/mcp55
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627hf chip superio/winbond/w83627hf # Super I/O
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 off # Parallel Port device pnp 2e.1 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -31,7 +30,7 @@ chip northbridge/amd/amdfam10/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
@ -40,15 +39,15 @@ chip northbridge/amd/amdfam10/root_complex
device pnp 2e.6 off # SFI device pnp 2e.6 off # SFI
io 0x62 = 0x100 io 0x62 = 0x100
end end
device pnp 2e.7 off # GPIO_GAME_MIDI device pnp 2e.7 off # GPIO, game port, MIDI
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.8 off end # WDTO_PLED device pnp 2e.8 off end # WDTO PLED
device pnp 2e.9 off end # GPIO_SUSLED device pnp 2e.9 off end # GPIO SUSLED
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
@ -56,13 +55,13 @@ chip northbridge/amd/amdfam10/root_complex
end end
device pci 1.1 on end device pci 1.1 on end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? # PCI device SMBus address will
# # depend on addon PCI device, do
chip drivers/generic/generic #MAC EEPROM # we need to scan_smbus_bus?
chip drivers/generic/generic # MAC EEPROM
device i2c 51 on end device i2c 51 on end
end end
end
end # SM
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE device pci 4.0 on end # IDE
@ -84,10 +83,11 @@ chip northbridge/amd/amdfam10/root_complex
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
@ -103,26 +103,24 @@ chip northbridge/amd/amdfam10/root_complex
device pci 3.1 on end device pci 3.1 on end
end end
device pci 1.1 on end device pci 1.1 on end
end #amd8132 end
end #device pci 19.0 end
device pci 19.1 on end device pci 19.1 on end
device pci 19.2 on end device pci 19.2 on end
device pci 19.3 on end device pci 19.3 on end
device pci 19.4 on end device pci 19.4 on end
end # mc0 end
end
end # PCI domain # chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# chip drivers/generic/debug # device pnp 0.1 on end # pci_regs_all
# device pnp 0.0 off end # chip name # device pnp 0.2 off end # mem
# device pnp 0.1 on end # pci_regs_all # device pnp 0.3 off end # cpuid
# device pnp 0.2 off end # mem # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.3 off end # cpuid # device pnp 0.5 off end # dual core msr
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.6 off end # cache size
# device pnp 0.5 off end # dual core msr # device pnp 0.7 off end # tsc
# device pnp 0.6 off end # cache size # device pnp 0.8 off end # io
# device pnp 0.7 off end # tsc # device pnp 0.9 on end # io
# device pnp 0.8 off end # io # end
# device pnp 0.9 on end # io end
# end
end #root_complex

153
src/mainboard/tyan/s2891/devicetree.cb
View File

@ -1,23 +1,22 @@
chip northbridge/amd/amdk8/root_complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_940 chip cpu/amd/socket_940 # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 #mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on # northbridge device pci 18.0 on # Link 0 == LDT 0
# devices on link 0, link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge
chip southbridge/nvidia/ck804
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627hf chip superio/winbond/w83627hf # Super I/O
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 off # Parallel Port device pnp 2e.1 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -29,16 +28,16 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard & mouse
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
irq 0x72 = 12 irq 0x72 = 12
end end
device pnp 2e.6 off # CIR device pnp 2e.6 off # Consumer IR
io 0x60 = 0x100 io 0x60 = 0x100
end end
device pnp 2e.7 off # GAME_MIDI_GIPO1 device pnp 2e.7 off # Game port, MIDI, GPIO1
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
@ -46,55 +45,55 @@ chip northbridge/amd/amdk8/root_complex
device pnp 2e.8 off end # GPIO2 device pnp 2e.8 off end # GPIO2
device pnp 2e.9 off end # GPIO3 device pnp 2e.9 off end # GPIO3
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b off # HW Monitor device pnp 2e.b off # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
# chip drivers/generic/generic #dimm 0-0-0 # chip drivers/generic/generic # DIMM 0-0-0
# device i2c 50 on end # device i2c 50 on end
# end # end
# chip drivers/generic/generic #dimm 0-0-1 # chip drivers/generic/generic # DIMM 0-0-1
# device i2c 51 on end # device i2c 51 on end
# end # end
# chip drivers/generic/generic #dimm 0-1-0 # chip drivers/generic/generic # DIMM 0-1-0
# device i2c 52 on end # device i2c 52 on end
# end # end
# chip drivers/generic/generic #dimm 0-1-1 # chip drivers/generic/generic # DIMM 0-1-1
# device i2c 53 on end # device i2c 53 on end
# end # end
# chip drivers/generic/generic #dimm 1-0-0 # chip drivers/generic/generic # DIMM 1-0-0
# device i2c 54 on end # device i2c 54 on end
# end # end
# chip drivers/generic/generic #dimm 1-0-1 # chip drivers/generic/generic # DIMM 1-0-1
# device i2c 55 on end # device i2c 55 on end
# end # end
# chip drivers/generic/generic #dimm 1-1-0 # chip drivers/generic/generic # DIMM 1-1-0
# device i2c 56 on end # device i2c 56 on end
# end # end
# chip drivers/generic/generic #dimm 1-1-1 # chip drivers/generic/generic # DIMM 1-1-1
# device i2c 57 on end # device i2c 57 on end
# end # end
end # SM end
# device pci 1.1 on # SM 1 # device pci 1.1 on # SM 1
# chip drivers/i2c/adm1027 # ADT7463A CPU0 temp, SYS FAN 2/3/4 # chip drivers/i2c/adm1027 # ADT7463A CPU0 temp, SYS FAN 2/3/4
# device i2c 2d on end # device i2c 2d on end
# end # end
# chip drivers/i2c/adm1027 # ADT7463A CPU1 temp, CPU0/1 FAN , SYS FAN 1/5 # chip drivers/i2c/adm1027 # ADT7463A CPU1 temp, CPU0/1 FAN , SYS FAN 1/5
# device i2c 2e on end # device i2c 2e on end
# end # end
# chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 6/7, SB FAN # chip drivers/generic/generic # Winbond HWM 0x54 CPU0/1 VRM temp, SYSFAN 6/7, SB FAN
# device i2c 2a on end # device i2c 2a on end
# end # end
# chip drivers/generic/generic # Winbond HWM 0x92 # chip drivers/generic/generic # Winbond HWM 0x92
# device i2c 49 on end # device i2c 49 on end
# end # end
# chip drivers/generic/generic # Winbond HWM 0x94 # chip drivers/generic/generic # Winbond HWM 0x94
# device i2c 4a on end # device i2c 4a on end
# end # end
# end #SM # end
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 off end # ACI device pci 4.0 off end # ACI
@ -116,12 +115,10 @@ chip northbridge/amd/amdk8/root_complex
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
end end
end # device pci 18.0 end
device pci 18.0 on end # Link 1 device pci 18.0 on end # Link 1
device pci 18.0 on device pci 18.0 on # Link 2 == LDT 2
# devices on link 2, link 2 == LDT 2 chip southbridge/amd/amd8131 # Southbridge
chip southbridge/amd/amd8131
# the on/off keyword is mandatory
device pci 0.0 on end device pci 0.0 on end
device pci 0.1 on end device pci 0.1 on end
device pci 1.0 on device pci 1.0 on
@ -130,23 +127,21 @@ chip northbridge/amd/amdk8/root_complex
end end
device pci 1.1 on end device pci 1.1 on end
end end
end # device pci 18.0 end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
end #mc0 end
end
end # pci_domain # chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# chip drivers/generic/debug # device pnp 0.1 off end # pci_regs_all
# device pnp 0.0 off end # chip name # device pnp 0.2 off end # mem
# device pnp 0.1 off end # pci_regs_all # device pnp 0.3 off end # cpuid
# device pnp 0.2 off end # mem # device pnp 0.4 off end # smbus_regs_all
# device pnp 0.3 off end # cpuid # device pnp 0.5 off end # dual core msr
# device pnp 0.4 off end # smbus_regs_all # device pnp 0.6 off end # cache size
# device pnp 0.5 off end # dual core msr # device pnp 0.7 off end # tsc
# device pnp 0.6 off end # cache size # device pnp 0.8 on end # hard_reset
# device pnp 0.7 off end # tsc # end
# device pnp 0.8 on end # hard_reset end
# end
end # root_complex

85
src/mainboard/tyan/s2892/devicetree.cb
View File

@ -1,23 +1,22 @@
chip northbridge/amd/amdk8/root_complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_940 chip cpu/amd/socket_940 # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 #mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on # northbridge device pci 18.0 on # Link 0 == LDT 0
# devices on link 0, link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge
chip southbridge/nvidia/ck804
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627hf chip superio/winbond/w83627hf # Super I/O
device pnp 2e.0 on # Floppy device pnp 2e.0 on # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 on # Parallel Port device pnp 2e.1 on # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
drq 0x74 = 3 drq 0x74 = 3
@ -30,16 +29,16 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard & mouse
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
irq 0x72 = 12 irq 0x72 = 12
end end
device pnp 2e.6 off # CIR device pnp 2e.6 off # Consumer IR
io 0x60 = 0x100 io 0x60 = 0x100
end end
device pnp 2e.7 off # GAME_MIDI_GIPO1 device pnp 2e.7 off # Game port, MIDI, GPIO1
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
@ -47,38 +46,38 @@ chip northbridge/amd/amdk8/root_complex
device pnp 2e.8 off end # GPIO2 device pnp 2e.8 off end # GPIO2
device pnp 2e.9 off end # GPIO3 device pnp 2e.9 off end # GPIO3
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 1-0-0 chip drivers/generic/generic # DIMM 1-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 1-0-1 chip drivers/generic/generic # DIMM 1-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 1-1-0 chip drivers/generic/generic # DIMM 1-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 1-1-1 chip drivers/generic/generic # DIMM 1-1-1
device i2c 57 on end device i2c 57 on end
end end
end # SM end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
chip drivers/i2c/adm1027 # ADT7463A CPU0 temp, SYS FAN 2/3/4 chip drivers/i2c/adm1027 # ADT7463A CPU0 temp, SYS FAN 2/3/4
device i2c 2d on end device i2c 2d on end
@ -95,7 +94,7 @@ chip northbridge/amd/amdk8/root_complex
chip drivers/generic/generic # Winbond HWM 0x94 chip drivers/generic/generic # Winbond HWM 0x94
device i2c 4a on end device i2c 4a on end
end end
end #SM end
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 off end # ACI device pci 4.0 off end # ACI
@ -119,34 +118,30 @@ chip northbridge/amd/amdk8/root_complex
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
end end
end # device pci 18.0 end
device pci 18.0 on end # Link 1 device pci 18.0 on end # Link 1
device pci 18.0 on device pci 18.0 on # Link 2 == LDT 2
# devices on link 2, link 2 == LDT 2 chip southbridge/amd/amd8131 # Southbridge
chip southbridge/amd/amd8131
# the on/off keyword is mandatory
device pci 0.0 on end device pci 0.0 on end
device pci 0.1 on end device pci 0.1 on end
device pci 1.0 on device pci 1.0 on
device pci 9.0 on end # broadcom 5704 device pci 9.0 on end # Broadcom 5704
device pci 9.1 on end device pci 9.1 on end
end end
device pci 1.1 on end device pci 1.1 on end
end end
end # device pci 18.0 end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
end #mc0 end
end
end # pci_domain # chip drivers/generic/debug
# device pnp 0.0 off end
# chip drivers/generic/debug # device pnp 0.1 off end
# device pnp 0.0 off end # device pnp 0.2 off end
# device pnp 0.1 off end # device pnp 0.3 off end
# device pnp 0.2 off end # device pnp 0.4 off end
# device pnp 0.3 off end # device pnp 0.5 on end
# device pnp 0.4 off end # end
# device pnp 0.5 on end end
# end
end # root_complex

102
src/mainboard/tyan/s2895/devicetree.cb
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@ -1,23 +1,22 @@
chip northbridge/amd/amdk8/root_complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_940 chip cpu/amd/socket_940 # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 #mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on # northbridge device pci 18.0 on # Link 0 == LDT 0
# devices on link 0, link 0 == LDT 0 chip southbridge/nvidia/ck804 # Southbridge
chip southbridge/nvidia/ck804
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/smsc/lpc47b397 chip superio/smsc/lpc47b397 # Super I/O
device pnp 2e.0 on # Floppy device pnp 2e.0 on # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.3 on # Parallel Port device pnp 2e.3 on # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
drq 0x74 = 4 drq 0x74 = 4
@ -30,13 +29,13 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.7 on # Keyboard device pnp 2e.7 on # PS/2 keyboard & mouse
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
irq 0x72 = 12 irq 0x72 = 12
end end
device pnp 2e.8 on # HW Monitor device pnp 2e.8 on # Hardware monitor
io 0x60 = 0x480 io 0x60 = 0x480
chip drivers/generic/generic # LM95221 CPU temp chip drivers/generic/generic # LM95221 CPU temp
device i2c 2b on end device i2c 2b on end
@ -51,37 +50,36 @@ chip northbridge/amd/amdk8/root_complex
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 1-0-0 chip drivers/generic/generic # DIMM 1-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 1-0-1 chip drivers/generic/generic # DIMM 1-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 1-1-0 chip drivers/generic/generic # DIMM 1-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 1-1-1 chip drivers/generic/generic # DIMM 1-1-1
device i2c 57 on end device i2c 57 on end
end end
end # SM end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
chip drivers/generic/generic #MAC EEPROM chip drivers/generic/generic # MAC EEPROM
device i2c 51 on end device i2c 51 on end
end end
end
end # SM
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # ACI device pci 4.0 on end # ACI
@ -99,33 +97,30 @@ chip northbridge/amd/amdk8/root_complex
register "ide1_enable" = "1" register "ide1_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.0 on end # Link 1 device pci 18.0 on end # Link 1
device pci 18.0 on device pci 18.0 on # Link 2 == LDT 2
# devices on link 2, link 2 == LDT 2 chip southbridge/amd/amd8131 # Southbridge
chip southbridge/amd/amd8131
# the on/off keyword is mandatory
device pci 0.0 on end device pci 0.0 on end
device pci 0.1 on end device pci 0.1 on end
device pci 1.0 on device pci 1.0 on
device pci 6.0 on end # lsi scsi device pci 6.0 on end # LSI SCSI
device pci 6.1 on end device pci 6.1 on end
end end
device pci 1.1 on end device pci 1.1 on end
end end
end # device pci 18.0 end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
end #mc0 end
chip northbridge/amd/amdk8 # Northbridge / RAM controller
chip northbridge/amd/amdk8 device pci 19.0 on # Link 0 == LDT 0
device pci 19.0 on # northbridge chip southbridge/nvidia/ck804 # Southbridge
# devices on link 0, link 0 == LDT 0
chip southbridge/nvidia/ck804
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on end # LPC device pci 1.0 on end # LPC
device pci 1.1 off end # SM device pci 1.1 off end # SM
@ -142,27 +137,26 @@ chip northbridge/amd/amdk8/root_complex
device pci c.0 off end # PCI E 2 device pci c.0 off end # PCI E 2
device pci d.0 off end # PCI E 1 device pci d.0 off end # PCI E 1
device pci e.0 on end # PCI E 0 device pci e.0 on end # PCI E 0
# 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3" register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 19.0 end
device pci 19.0 on end device pci 19.0 on end
device pci 19.0 on end device pci 19.0 on end
device pci 19.1 on end device pci 19.1 on end
device pci 19.2 on end device pci 19.2 on end
device pci 19.3 on end device pci 19.3 on end
end end
end # PCI domain end
# chip drivers/generic/debug
# chip drivers/generic/debug # device pnp 0.0 off end # chip name
# device pnp 0.0 off end # chip name # device pnp 0.1 off end # pci_regs_all
# device pnp 0.1 off end # pci_regs_all # device pnp 0.2 off end # mem
# device pnp 0.2 off end # mem # device pnp 0.3 off end # cpuid
# device pnp 0.3 off end # cpuid # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.5 off end # dual core msr
# device pnp 0.5 off end # dual core msr # device pnp 0.6 off end # cache size
# device pnp 0.6 off end # cache size # device pnp 0.7 off end # tsc
# device pnp 0.7 off end # tsc # end
# end end
end # root_complex

129
src/mainboard/tyan/s2912/devicetree.cb
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@ -1,25 +1,24 @@
chip northbridge/amd/amdk8/root_complex chip northbridge/amd/amdk8/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_F chip cpu/amd/socket_F # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdk8 #mc0 chip northbridge/amd/amdk8 # Northbridge / RAM controller
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on device pci 18.0 on
# devices on link 0, link 0 == LDT 0 chip southbridge/nvidia/mcp55 # Southbridge
chip southbridge/nvidia/mcp55
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627hf chip superio/winbond/w83627hf # Super I/O
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 off # Parallel Port device pnp 2e.1 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -31,7 +30,7 @@ chip northbridge/amd/amdk8/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
@ -40,71 +39,72 @@ chip northbridge/amd/amdk8/root_complex
device pnp 2e.6 off # SFI device pnp 2e.6 off # SFI
io 0x62 = 0x100 io 0x62 = 0x100
end end
device pnp 2e.7 off # GPIO_GAME_MIDI device pnp 2e.7 off # GPIO, game port, MIDI
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.8 off end # WDTO_PLED device pnp 2e.8 off end # WDTO PLED
device pnp 2e.9 off end # GPIO_SUSLED device pnp 2e.9 off end # GPIO SUSLED
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 1-0-0 chip drivers/generic/generic # DIMM 1-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 1-0-1 chip drivers/generic/generic # DIMM 1-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 1-1-0 chip drivers/generic/generic # DIMM 1-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 1-1-1 chip drivers/generic/generic # DIMM 1-1-1
device i2c 57 on end device i2c 57 on end
end end
end # SM end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? # PCI device SMBus address will
# chip drivers/generic/generic #PCIXA Slot1 # depend on addon PCI device, do
# device i2c 50 on end # we need to scan_smbus_bus?
# end # chip drivers/generic/generic # PCIXA slot 1
# chip drivers/generic/generic #PCIXB Slot1 # device i2c 50 on end
# device i2c 51 on end # end
# end # chip drivers/generic/generic # PCIXB slot 1
# chip drivers/generic/generic #PCIXB Slot2 # device i2c 51 on end
# device i2c 52 on end # end
# end # chip drivers/generic/generic # PCIXB slot 2
# chip drivers/generic/generic #PCI Slot1 # device i2c 52 on end
# device i2c 53 on end # end
# end # chip drivers/generic/generic # PCI slot 1
# chip drivers/generic/generic #Master MCP55 PCI-E # device i2c 53 on end
# device i2c 54 on end # end
# end # chip drivers/generic/generic # Master MCP55 PCI-E
# chip drivers/generic/generic #Slave MCP55 PCI-E # device i2c 54 on end
# device i2c 55 on end # end
# end # chip drivers/generic/generic # Slave MCP55 PCI-E
chip drivers/generic/generic #MAC EEPROM # device i2c 55 on end
# end
chip drivers/generic/generic # MAC EEPROM
device i2c 51 on end device i2c 51 on end
end end
end
end # SM
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE device pci 4.0 on end # IDE
@ -124,27 +124,26 @@ chip northbridge/amd/amdk8/root_complex
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
end # mc0 end
end
end # PCI domain # chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# chip drivers/generic/debug # device pnp 0.1 on end # pci_regs_all
# device pnp 0.0 off end # chip name # device pnp 0.2 on end # mem
# device pnp 0.1 on end # pci_regs_all # device pnp 0.3 off end # cpuid
# device pnp 0.2 on end # mem # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.3 off end # cpuid # device pnp 0.5 off end # dual core msr
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.6 off end # cache size
# device pnp 0.5 off end # dual core msr # device pnp 0.7 off end # tsc
# device pnp 0.6 off end # cache size # device pnp 0.8 off end # io
# device pnp 0.7 off end # tsc # device pnp 0.9 off end # io
# device pnp 0.8 off end # io # end
# device pnp 0.9 off end # io end
# end
end #root_complex

135
src/mainboard/tyan/s2912_fam10/devicetree.cb
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@ -1,25 +1,24 @@
chip northbridge/amd/amdfam10/root_complex chip northbridge/amd/amdfam10/root_complex # Root complex
device lapic_cluster 0 on device lapic_cluster 0 on # (L)APIC cluster
chip cpu/amd/socket_F_1207 chip cpu/amd/socket_F_1207 # CPU socket
device lapic 0 on end device lapic 0 on end # Local APIC of the CPU
end end
end end
device pci_domain 0 on device pci_domain 0 on # PCI domain
chip northbridge/amd/amdfam10 #mc0 chip northbridge/amd/amdfam10 # Northbridge / RAM controller
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on end device pci 18.0 on end
device pci 18.0 on device pci 18.0 on # SB on link 2
# SB on link 2.0. chip southbridge/nvidia/mcp55 # Southbridge
chip southbridge/nvidia/mcp55
device pci 0.0 on end # HT device pci 0.0 on end # HT
device pci 1.0 on # LPC device pci 1.0 on # LPC
chip superio/winbond/w83627hf chip superio/winbond/w83627hf # Super I/O
device pnp 2e.0 off # Floppy device pnp 2e.0 off # Floppy
io 0x60 = 0x3f0 io 0x60 = 0x3f0
irq 0x70 = 6 irq 0x70 = 6
drq 0x74 = 2 drq 0x74 = 2
end end
device pnp 2e.1 off # Parallel Port device pnp 2e.1 off # Parallel port
io 0x60 = 0x378 io 0x60 = 0x378
irq 0x70 = 7 irq 0x70 = 7
end end
@ -31,7 +30,7 @@ chip northbridge/amd/amdfam10/root_complex
io 0x60 = 0x2f8 io 0x60 = 0x2f8
irq 0x70 = 3 irq 0x70 = 3
end end
device pnp 2e.5 on # Keyboard device pnp 2e.5 on # PS/2 keyboard
io 0x60 = 0x60 io 0x60 = 0x60
io 0x62 = 0x64 io 0x62 = 0x64
irq 0x70 = 1 irq 0x70 = 1
@ -40,80 +39,81 @@ chip northbridge/amd/amdfam10/root_complex
device pnp 2e.6 off # SFI device pnp 2e.6 off # SFI
io 0x62 = 0x100 io 0x62 = 0x100
end end
device pnp 2e.7 off # GPIO_GAME_MIDI device pnp 2e.7 off # GPIO, game port, MIDI
io 0x60 = 0x220 io 0x60 = 0x220
io 0x62 = 0x300 io 0x62 = 0x300
irq 0x70 = 9 irq 0x70 = 9
end end
device pnp 2e.8 off end # WDTO_PLED device pnp 2e.8 off end # WDTO PLED
device pnp 2e.9 off end # GPIO_SUSLED device pnp 2e.9 off end # GPIO SUSLED
device pnp 2e.a off end # ACPI device pnp 2e.a off end # ACPI
device pnp 2e.b on # HW Monitor device pnp 2e.b on # Hardware monitor
io 0x60 = 0x290 io 0x60 = 0x290
irq 0x70 = 5 irq 0x70 = 5
end end
end end
end end
device pci 1.1 on # SM 0 device pci 1.1 on # SM 0
chip drivers/generic/generic #dimm 0-0-0 chip drivers/generic/generic # DIMM 0-0-0
device i2c 50 on end device i2c 50 on end
end end
chip drivers/generic/generic #dimm 0-0-1 chip drivers/generic/generic # DIMM 0-0-1
device i2c 51 on end device i2c 51 on end
end end
chip drivers/generic/generic #dimm 0-1-0 chip drivers/generic/generic # DIMM 0-1-0
device i2c 52 on end device i2c 52 on end
end end
chip drivers/generic/generic #dimm 0-1-1 chip drivers/generic/generic # DIMM 0-1-1
device i2c 53 on end device i2c 53 on end
end end
chip drivers/generic/generic #dimm 1-0-0 chip drivers/generic/generic # DIMM 1-0-0
device i2c 54 on end device i2c 54 on end
end end
chip drivers/generic/generic #dimm 1-0-1 chip drivers/generic/generic # DIMM 1-0-1
device i2c 55 on end device i2c 55 on end
end end
chip drivers/generic/generic #dimm 1-1-0 chip drivers/generic/generic # DIMM 1-1-0
device i2c 56 on end device i2c 56 on end
end end
chip drivers/generic/generic #dimm 1-1-1 chip drivers/generic/generic # DIMM 1-1-1
device i2c 57 on end device i2c 57 on end
end end
end # SM end
device pci 1.1 on # SM 1 device pci 1.1 on # SM 1
#PCI device smbus address will depend on addon pci device, do we need to scan_smbus_bus? # PCI device SMBus address will
# chip drivers/generic/generic #PCIXA Slot1 # depend on addon PCI device, do
# device i2c 50 on end # we need to scan_smbus_bus?
# end # chip drivers/generic/generic # PCIXA slot 1
# chip drivers/generic/generic #PCIXB Slot1 # device i2c 50 on end
# device i2c 51 on end # end
# end # chip drivers/generic/generic # PCIXB slot 1
# chip drivers/generic/generic #PCIXB Slot2 # device i2c 51 on end
# device i2c 52 on end # end
# end # chip drivers/generic/generic # PCIXB slot 2
# chip drivers/generic/generic #PCI Slot1 # device i2c 52 on end
# device i2c 53 on end # end
# end # chip drivers/generic/generic # PCI slot 1
# chip drivers/generic/generic #Master MCP55 PCI-E # device i2c 53 on end
# device i2c 54 on end # end
# end # chip drivers/generic/generic # Master MCP55 PCI-E
# chip drivers/generic/generic #Slave MCP55 PCI-E # device i2c 54 on end
# device i2c 55 on end # end
# end # chip drivers/generic/generic # Slave MCP55 PCI-E
chip drivers/generic/generic #MAC EEPROM # device i2c 55 on end
# end
chip drivers/generic/generic # MAC EEPROM
device i2c 51 on end device i2c 51 on end
end end
end
end # SM
device pci 2.0 on end # USB 1.1 device pci 2.0 on end # USB 1.1
device pci 2.1 on end # USB 2 device pci 2.1 on end # USB 2
device pci 4.0 on end # IDE device pci 4.0 on end # IDE
device pci 5.0 on end # SATA 0 device pci 5.0 on end # SATA 0
device pci 5.1 on end # SATA 1 device pci 5.1 on end # SATA 1
device pci 5.2 on end # SATA 2 device pci 5.2 on end # SATA 2
device pci 6.0 on device pci 6.0 on # PCI
device pci 4.0 on end device pci 4.0 on end
end # PCI end
device pci 6.1 off end # AZA device pci 6.1 off end # AZA
device pci 8.0 on end # NIC device pci 8.0 on end # NIC
device pci 9.0 on end # NIC device pci 9.0 on end # NIC
@ -126,28 +126,27 @@ chip northbridge/amd/amdfam10/root_complex
register "ide0_enable" = "1" register "ide0_enable" = "1"
register "sata0_enable" = "1" register "sata0_enable" = "1"
register "sata1_enable" = "1" register "sata1_enable" = "1"
register "mac_eeprom_smbus" = "3" # 1: smbus under 2e.8, 2: SM0 3: SM1 # 1: SMBus under 2e.8, 2: SM0 3: SM1
register "mac_eeprom_smbus" = "3"
register "mac_eeprom_addr" = "0x51" register "mac_eeprom_addr" = "0x51"
end end
end # device pci 18.0 end
device pci 18.1 on end device pci 18.1 on end
device pci 18.2 on end device pci 18.2 on end
device pci 18.3 on end device pci 18.3 on end
device pci 18.4 on end device pci 18.4 on end
end # mc0 end
end
end # PCI domain # chip drivers/generic/debug
# device pnp 0.0 off end # chip name
# chip drivers/generic/debug # device pnp 0.1 on end # pci_regs_all
# device pnp 0.0 off end # chip name # device pnp 0.2 on end # mem
# device pnp 0.1 on end # pci_regs_all # device pnp 0.3 off end # cpuid
# device pnp 0.2 on end # mem # device pnp 0.4 on end # smbus_regs_all
# device pnp 0.3 off end # cpuid # device pnp 0.5 off end # dual core msr
# device pnp 0.4 on end # smbus_regs_all # device pnp 0.6 off end # cache size
# device pnp 0.5 off end # dual core msr # device pnp 0.7 off end # tsc
# device pnp 0.6 off end # cache size # device pnp 0.8 off end # io
# device pnp 0.7 off end # tsc # device pnp 0.9 off end # io
# device pnp 0.8 off end # io # end
# device pnp 0.9 off end # io end
# end
end #root_complex