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sb/amd/pi/hudson: Use {read,write}16/32p() 

Change-Id: Ic8621a18a1b3c299c3d6eb7b4bff39f1ff7d8492
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70290
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Elyes Haouas 2022-12-03 13:38:56 +01:00 committed by Felix Held
parent a361d35b8d
commit 067642d939
1 changed files with 18 additions and 18 deletions
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18
src/southbridge/amd/pi/hudson/early_setup.c
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@ -210,20 +210,20 @@ static uintptr_t hudson_spibase(void)
void hudson_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm) void hudson_set_spi100(u16 norm, u16 fast, u16 alt, u16 tpm)
{ {
uintptr_t base = hudson_spibase(); uintptr_t base = hudson_spibase();
write16((void *)(base + SPI100_SPEED_CONFIG), write16p(base + SPI100_SPEED_CONFIG,
(norm << SPI_NORM_SPEED_NEW_SH) | (norm << SPI_NORM_SPEED_NEW_SH) |
(fast << SPI_FAST_SPEED_NEW_SH) | (fast << SPI_FAST_SPEED_NEW_SH) |
(alt << SPI_ALT_SPEED_NEW_SH) | (alt << SPI_ALT_SPEED_NEW_SH) |
(tpm << SPI_TPM_SPEED_NEW_SH)); (tpm << SPI_TPM_SPEED_NEW_SH));
write16((void *)(base + SPI100_ENABLE), SPI_USE_SPI100 | write16p(base + SPI100_ENABLE, SPI_USE_SPI100 |
read16((void *)(base + SPI100_ENABLE))); read16p(base + SPI100_ENABLE));
} }
void hudson_disable_4dw_burst(void) void hudson_disable_4dw_burst(void)
{ {
uintptr_t base = hudson_spibase(); uintptr_t base = hudson_spibase();
write16((void *)(base + SPI100_HOST_PREF_CONFIG), write16p(base + SPI100_HOST_PREF_CONFIG,
read16((void *)(base + SPI100_HOST_PREF_CONFIG)) read16p(base + SPI100_HOST_PREF_CONFIG)
& ~SPI_RD4DW_EN_HOST); & ~SPI_RD4DW_EN_HOST);
} }
@ -231,8 +231,8 @@ void hudson_disable_4dw_burst(void)
void hudson_set_readspeed(u16 norm, u16 fast) void hudson_set_readspeed(u16 norm, u16 fast)
{ {
uintptr_t base = hudson_spibase(); uintptr_t base = hudson_spibase();
write16((void *)(base + SPI_CNTRL1), write16p(base + SPI_CNTRL1,
(read16((void *)(base + SPI_CNTRL1)) (read16p(base + SPI_CNTRL1)
& ~SPI_CNTRL1_SPEED_MASK) & ~SPI_CNTRL1_SPEED_MASK)
| (norm << SPI_NORM_SPEED_SH) | (norm << SPI_NORM_SPEED_SH)
| (fast << SPI_FAST_SPEED_SH)); | (fast << SPI_FAST_SPEED_SH));
@ -241,8 +241,8 @@ void hudson_set_readspeed(u16 norm, u16 fast)
void hudson_read_mode(u32 mode) void hudson_read_mode(u32 mode)
{ {
uintptr_t base = hudson_spibase(); uintptr_t base = hudson_spibase();
write32((void *)(base + SPI_CNTRL0), write32p(base + SPI_CNTRL0,
(read32((void *)(base + SPI_CNTRL0)) (read32p(base + SPI_CNTRL0)
& ~SPI_READ_MODE_MASK) | mode); & ~SPI_READ_MODE_MASK) | mode);
} }