mb/*/*/cmos.default: Harmonise CMOS files syntax

These files are being updated to match the prevailing style
of cmos.default files.

Change-Id: I47d31d6fec8c9eb856aed0c63824d9556b7705e4
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/28051
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Elyes HAOUAS 2018-08-11 16:19:34 +02:00 committed by Martin Roth
parent fe124925ad
commit 068253c369
8 changed files with 94 additions and 94 deletions

View File

@ -1,29 +1,29 @@
debug_level = Debug
multi_core = Enable
slow_cpu = off
compute_unit_siblings = Enable
iommu = Enable
nmi = Disable
hypertransport_speed_limit = Auto
max_mem_clock = DDR3-1600
minimum_memory_voltage = 1.5V
dimm_spd_checksum = Enforce
ECC_memory = Enable
ECC_redirection = Enable
ecc_scrub_rate = 1.28us
interleave_chip_selects = Enable
interleave_nodes = Disable
interleave_memory_channels = Enable
cpu_c_states = Enable
cpu_cc6_state = Enable
cpu_core_boost = Enable
sata_ahci_mode = Enable
sata_alpm = Disable
maximum_p_state_limit = 0xf
probe_filter = Auto
l3_cache_partitioning = Disable
gart = Enable
ehci_async_data_cache = Enable
experimental_memory_speed_boost = Disable
power_on_after_fail = On
boot_option = Fallback
debug_level=Debug
multi_core=Enable
slow_cpu=off
compute_unit_siblings=Enable
iommu=Enable
nmi=Disable
hypertransport_speed_limit=Auto
max_mem_clock=DDR3-1600
minimum_memory_voltage=1.5V
dimm_spd_checksum=Enforce
ECC_memory=Enable
ECC_redirection=Enable
ecc_scrub_rate=1.28us
interleave_chip_selects=Enable
interleave_nodes=Disable
interleave_memory_channels=Enable
cpu_c_states=Enable
cpu_cc6_state=Enable
cpu_core_boost=Enable
sata_ahci_mode=Enable
sata_alpm=Disable
maximum_p_state_limit=0xf
probe_filter=Auto
l3_cache_partitioning=Disable
gart=Enable
ehci_async_data_cache=Enable
experimental_memory_speed_boost=Disable
power_on_after_fail=On
boot_option=Fallback

View File

@ -1,13 +1,13 @@
debug_level = Debug
multi_core = Enable
slow_cpu = off
hypertransport_speed_limit = Auto
max_mem_clock = DDR2-800
ECC_memory = Enable
ECC_redirection = Disable
ecc_scrub_rate = 1.28us
interleave_chip_selects = Enable
interleave_nodes = Disable
interleave_memory_channels = Enable
power_on_after_fail = Enable
boot_option = Fallback
debug_level=Debug
multi_core=Enable
slow_cpu=off
hypertransport_speed_limit=Auto
max_mem_clock=DDR2-800
ECC_memory=Enable
ECC_redirection=Disable
ecc_scrub_rate=1.28us
interleave_chip_selects=Enable
interleave_nodes=Disable
interleave_memory_channels=Enable
power_on_after_fail=Enable
boot_option=Fallback

View File

@ -1,30 +1,30 @@
debug_level = Debug
multi_core = Enable
slow_cpu = off
compute_unit_siblings = Enable
iommu = Enable
nmi = Disable
hypertransport_speed_limit = Auto
max_mem_clock = DDR3-1600
minimum_memory_voltage = 1.5V
dimm_spd_checksum = Enforce
ECC_memory = Enable
ECC_redirection = Enable
ecc_scrub_rate = 1.28us
interleave_chip_selects = Enable
interleave_nodes = Disable
interleave_memory_channels = Enable
cpu_c_states = Enable
cpu_cc6_state = Enable
cpu_core_boost = Enable
sata_ahci_mode = Enable
sata_alpm = Disable
maximum_p_state_limit = 0xf
probe_filter = Auto
l3_cache_partitioning = Disable
ieee1394_controller = Enable
gart = Enable
ehci_async_data_cache = Enable
experimental_memory_speed_boost = Disable
power_on_after_fail = On
boot_option = Fallback
debug_level=Debug
multi_core=Enable
slow_cpu=off
compute_unit_siblings=Enable
iommu=Enable
nmi=Disable
hypertransport_speed_limit=Auto
max_mem_clock=DDR3-1600
minimum_memory_voltage=1.5V
dimm_spd_checksum=Enforce
ECC_memory=Enable
ECC_redirection=Enable
ecc_scrub_rate=1.28us
interleave_chip_selects=Enable
interleave_nodes=Disable
interleave_memory_channels=Enable
cpu_c_states=Enable
cpu_cc6_state=Enable
cpu_core_boost=Enable
sata_ahci_mode=Enable
sata_alpm=Disable
maximum_p_state_limit=0xf
probe_filter=Auto
l3_cache_partitioning=Disable
ieee1394_controller=Enable
gart=Enable
ehci_async_data_cache=Enable
experimental_memory_speed_boost=Disable
power_on_after_fail=On
boot_option=Fallback

View File

@ -1,4 +1,4 @@
boot_option = Fallback
power_on_after_fail = Enable
debug_level = Debug
ECC_memory = Disable
boot_option=Fallback
power_on_after_fail=Enable
debug_level=Debug
ECC_memory=Disable

View File

@ -1,4 +1,4 @@
boot_option = Fallback
power_on_after_fail = Enable
debug_level = Debug
ECC_memory = Disable
boot_option=Fallback
power_on_after_fail=Enable
debug_level=Debug
ECC_memory=Disable

View File

@ -1,5 +1,5 @@
boot_option = Fallback
debug_level = Debug
nmi = Enable
power_on_after_fail = Enable
sata_mode = AHCI
boot_option=Fallback
debug_level=Debug
nmi=Enable
power_on_after_fail=Enable
sata_mode=AHCI

View File

@ -1,5 +1,5 @@
boot_option = Fallback
debug_level = Debug
nmi = Enable
power_on_after_fail = Enable
sata_mode = AHCI
boot_option=Fallback
debug_level=Debug
nmi=Enable
power_on_after_fail=Enable
sata_mode=AHCI

View File

@ -1,4 +1,4 @@
boot_option = Fallback
debug_level = Debug
nmi = Disable
power_on_after_fail = Disable
boot_option=Fallback
debug_level=Debug
nmi=Disable
power_on_after_fail=Disable