drivers/intel/gma: Amend stride calculation of linear fb

Aligning the stride up to a multiple of 64 pixels was flawed: We want
to actually align up to one cacheline (64 bytes) as that's the mini-
mum what the hardware supports.

Change-Id: I3f824ffd7d12835935e4e4bde29fe82dc3e16f9d
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Reviewed-on: https://review.coreboot.org/25451
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

src/drivers/intel/gma/hires_fb/gma.adb

@@ -83,7 +83,7 @@ is
                (Width   => Width_Type (min_h),
                 Height  => Height_Type (min_v),
                 BPC     => 8,
-                Stride  => ((Width_Type (min_h) + 63) / 64) * 64,
+                Stride  => Div_Round_Up (Width_Type (min_h), 16) * 16,
                 Offset  => 0);
             for i in Pipe_Index loop
                exit when configs (i).Port = Disabled;