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mb/google/coral: add usb2 phy setting override for some variants 

Due to there are some chances USB devices can not be detected.
USB2 port#1 and #4 PHY register need to be overridden for variants
Santa/Lava/Blue/Bruce/Astronaut.

port#1:
PERPORTPETXISET = 4
PERPORTTXISET = 4
IUSBTXEMPHASISEN= 1
PERPORTTXPEHALF= 0

port#4:
PERPORTPETXISET = 7
PERPORTTXISET = 7
IUSBTXEMPHASISEN= 1
PERPORTTXPEHALF= 0

BUG=b:72623892
BRANCH=master
TEST=emerge-coral coreboot chromeos-bootimage

Change-Id: I401905685cc3078df657919b162272c3de320296
Signed-off-by: Pan Sheng-Liang <Sheng-Liang.Pan@quantatw.com>
Reviewed-on: https://review.coreboot.org/23881
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Sheng-Liang Pan 2018-02-27 20:40:16 +08:00 committed by Martin Roth
parent 23cff8bf50
commit 06e3e1f055
1 changed files with 56 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

63
src/mainboard/google/reef/variants/coral/mainboard.c
View File

@ -28,8 +28,13 @@ enum {
SKU_3_SANTA = 3, SKU_3_SANTA = 3,
SKU_4_LAVA = 4, SKU_4_LAVA = 4,
SKU_5_LAVA = 5, SKU_5_LAVA = 5,
SKU_6_BLUE = 6,
SKU_7_BLUE = 7,
SKU_8_BRUCE = 8,
SKU_9_LAVA = 9, SKU_9_LAVA = 9,
SKU_10_LAVA = 10, SKU_10_LAVA = 10,
SKU_11_BRUCE = 11,
SKU_12_BLUE = 12,
SKU_61_ASTRONAUT = 61, SKU_61_ASTRONAUT = 61,
SKU_62_ASTRONAUT = 62, SKU_62_ASTRONAUT = 62,
SKU_160_NASHER = 160, SKU_160_NASHER = 160,
@ -71,25 +76,63 @@ void mainboard_devtree_update(struct device *dev)
switch (sku_id) { switch (sku_id) {
case SKU_0_ASTRONAUT: case SKU_0_ASTRONAUT:
case SKU_1_ASTRONAUT: case SKU_1_ASTRONAUT:
cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7; case SKU_61_ASTRONAUT:
cfg->usb2eye[1].Usb20PerPortTxiSet = 2; case SKU_62_ASTRONAUT:
cfg->usb2eye[1].Usb20PerPortPeTxiSet = 4;
cfg->usb2eye[1].Usb20PerPortTxiSet = 4;
cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
break; break;
case SKU_2_SANTA: case SKU_2_SANTA:
case SKU_3_SANTA: case SKU_3_SANTA:
cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7; cfg->usb2eye[1].Usb20PerPortPeTxiSet = 4;
cfg->usb2eye[1].Usb20PerPortTxiSet = 2; cfg->usb2eye[1].Usb20PerPortTxiSet = 4;
cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
break; break;
case SKU_4_LAVA: case SKU_4_LAVA:
case SKU_5_LAVA: case SKU_5_LAVA:
case SKU_9_LAVA: case SKU_9_LAVA:
case SKU_10_LAVA: case SKU_10_LAVA:
cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7; cfg->usb2eye[1].Usb20PerPortPeTxiSet = 4;
cfg->usb2eye[1].Usb20PerPortTxiSet = 2; cfg->usb2eye[1].Usb20PerPortTxiSet = 4;
cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
break; break;
case SKU_61_ASTRONAUT: case SKU_6_BLUE:
case SKU_62_ASTRONAUT: case SKU_7_BLUE:
cfg->usb2eye[1].Usb20PerPortPeTxiSet = 7; case SKU_12_BLUE:
cfg->usb2eye[1].Usb20PerPortTxiSet = 5; cfg->usb2eye[1].Usb20PerPortPeTxiSet = 4;
cfg->usb2eye[1].Usb20PerPortTxiSet = 4;
cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
break;
case SKU_8_BRUCE:
case SKU_11_BRUCE:
cfg->usb2eye[1].Usb20PerPortPeTxiSet = 4;
cfg->usb2eye[1].Usb20PerPortTxiSet = 4;
cfg->usb2eye[1].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[1].Usb20PerPortTxPeHalf = 0;
cfg->usb2eye[4].Usb20PerPortPeTxiSet = 7;
cfg->usb2eye[4].Usb20PerPortTxiSet = 7;
cfg->usb2eye[4].Usb20IUsbTxEmphasisEn = 1;
cfg->usb2eye[4].Usb20PerPortTxPeHalf = 0;
break; break;
default: default:
break; break;