From 06e6983002ccf2af41e2739c21d0b9e79608d8c9 Mon Sep 17 00:00:00 2001
From: Angel Pons <th3fanbus@gmail.com>
Date: Tue, 12 Jan 2021 17:13:05 +0100
Subject: [PATCH] soc/intel/braswell: Prevent NULL pointer dereference

Exit early if the chipset power state info isn't in CBMEM. Return -1 in
order to ensure the one caller of this function exits early as well.

Found-by: Coverity CID 1442304
Change-Id: Ifa42ba3024d3144de486d90ed7752820482549bf
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49359
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Lance Zhao
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/intel/braswell/ramstage.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/soc/intel/braswell/ramstage.c b/src/soc/intel/braswell/ramstage.c
index 7b92c52e78..de90cb7b61 100644
--- a/src/soc/intel/braswell/ramstage.c
+++ b/src/soc/intel/braswell/ramstage.c
@@ -125,6 +125,9 @@ int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0)
 	struct chipset_power_state *ps = cbmem_find(CBMEM_ID_POWER_STATE);
 	static uint32_t gpe0_sts;
 
+	if (!ps)
+		return -1;
+
 	*pm1 = ps->pm1_sts & ps->pm1_en;
 
 	gpe0_sts = ps->gpe0_sts & ps->gpe0_en;