GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

global: Refactor get_option usage 

Restructure get_option() calls to avoid unnecessary return value checks
by pre-assigning defaults to the options being retrieved.

Change-Id: I9159afe149a8eeed0785d1efd6eee8420b88b8f4
Signed-off-by: Varad Gautam <varadgautam@gmail.com>
Reviewed-on: http://review.coreboot.org/8631
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
This commit is contained in:
Varad Gautam 2015-03-11 09:54:41 +05:30 committed by Marc Jones
parent 015f0aea5d
commit 06ef046045
9 changed files with 38 additions and 42 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/console/init.c
View File

@ -37,8 +37,8 @@ int console_log_level(int msg_level)
void console_init(void) void console_init(void)
{ {
#if !defined(__PRE_RAM__) #if !defined(__PRE_RAM__)
if(get_option(&console_loglevel, "debug_level") != CB_SUCCESS) console_loglevel = CONFIG_DEFAULT_CONSOLE_LOGLEVEL;
console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL; get_option(&console_loglevel, "debug_level");
#endif #endif
#if CONFIG_EARLY_PCI_BRIDGE && !defined(__SMM__) #if CONFIG_EARLY_PCI_BRIDGE && !defined(__SMM__)

5
src/cpu/amd/model_fxx/model_fxx_init.c
View File

@ -250,9 +250,8 @@ static void init_ecc_memory(unsigned node_id)
} }
/* See if we scrubbing should be enabled */ /* See if we scrubbing should be enabled */
enable_scrubbing = 1; enable_scrubbing = CONFIG_HW_SCRUBBER;
if (get_option(&enable_scrubbing, "hw_scrubber") != CB_SUCCESS) get_option(&enable_scrubbing, "hw_scrubber");
enable_scrubbing = CONFIG_HW_SCRUBBER;
/* Enable cache scrubbing at the lowest possible rate */ /* Enable cache scrubbing at the lowest possible rate */
if (enable_scrubbing) { if (enable_scrubbing) {

24
src/mainboard/ibase/mb899/superio_hwm.c
View File

@ -80,19 +80,19 @@ void hwm_setup(void)
int cpufan_speed = 0, sysfan_speed = 0; int cpufan_speed = 0, sysfan_speed = 0;
int cpufan_temperature = 0, sysfan_temperature = 0; int cpufan_temperature = 0, sysfan_temperature = 0;
if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS) cpufan_control = FAN_CRUISE_CONTROL_DISABLED;
cpufan_control = FAN_CRUISE_CONTROL_DISABLED; get_option(&cpufan_control, "cpufan_cruise_control");
if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS) cpufan_speed = FAN_SPEED_5625;
cpufan_speed = FAN_SPEED_5625; get_option(&cpufan_speed, "cpufan_speed");
//if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS) //cpufan_temperature = FAN_TEMPERATURE_30DEGC;
// cpufan_temperature = FAN_TEMPERATURE_30DEGC; //get_option(&cpufan_temperature, "cpufan_temperature");
if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS) sysfan_control = FAN_CRUISE_CONTROL_DISABLED;
sysfan_control = FAN_CRUISE_CONTROL_DISABLED; get_option(&sysfan_control, "sysfan_cruise_control");
if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS) sysfan_speed = FAN_SPEED_5625;
sysfan_speed = FAN_SPEED_5625; get_option(&sysfan_speed, "sysfan_speed");
//if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS) //sysfan_temperature = FAN_TEMPERATURE_30DEGC;
// sysfan_temperature = FAN_TEMPERATURE_30DEGC; //get_option(&sysfan_temperature, "sysfan_temperature");
// hwm_write(0x31, 0x20); // AVCC high limit // hwm_write(0x31, 0x20); // AVCC high limit
// hwm_write(0x34, 0x06); // VIN2 low limit // hwm_write(0x34, 0x06); // VIN2 low limit

24
src/mainboard/kontron/986lcd-m/mainboard.c
View File

@ -79,19 +79,19 @@ static void hwm_setup(void)
int cpufan_speed = 0, sysfan_speed = 0; int cpufan_speed = 0, sysfan_speed = 0;
int cpufan_temperature = 0, sysfan_temperature = 0; int cpufan_temperature = 0, sysfan_temperature = 0;
if (get_option(&cpufan_control, "cpufan_cruise_control") != CB_SUCCESS) cpufan_control = FAN_CRUISE_CONTROL_DISABLED;
cpufan_control = FAN_CRUISE_CONTROL_DISABLED; get_option(&cpufan_control, "cpufan_cruise_control");
if (get_option(&cpufan_speed, "cpufan_speed") != CB_SUCCESS) cpufan_speed = FAN_SPEED_5625;
cpufan_speed = FAN_SPEED_5625; get_option(&cpufan_speed, "cpufan_speed");
//if (get_option(&cpufan_temperature, "cpufan_temperature") != CB_SUCCESS) //cpufan_temperature = FAN_TEMPERATURE_30DEGC;
// cpufan_temperature = FAN_TEMPERATURE_30DEGC; //get_option(&cpufan_temperature, "cpufan_temperature");
if (get_option(&sysfan_control, "sysfan_cruise_control") != CB_SUCCESS) sysfan_control = FAN_CRUISE_CONTROL_DISABLED;
sysfan_control = FAN_CRUISE_CONTROL_DISABLED; get_option(&sysfan_control, "sysfan_cruise_control");
if (get_option(&sysfan_speed, "sysfan_speed") != CB_SUCCESS) sysfan_speed = FAN_SPEED_5625;
sysfan_speed = FAN_SPEED_5625; get_option(&sysfan_speed, "sysfan_speed");
//if (get_option(&sysfan_temperature, "sysfan_temperature") != CB_SUCCESS) //sysfan_temperature = FAN_TEMPERATURE_30DEGC;
// sysfan_temperature = FAN_TEMPERATURE_30DEGC; //get_option(&sysfan_temperature, "sysfan_temperature");
// hwm_write(0x31, 0x20); // AVCC high limit // hwm_write(0x31, 0x20); // AVCC high limit
// hwm_write(0x34, 0x06); // VIN2 low limit // hwm_write(0x34, 0x06); // VIN2 low limit

5
src/northbridge/amd/amdk8/misc_control.c
View File

@ -47,9 +47,8 @@ static void mcf3_read_resources(device_t dev)
return; return;
} }
iommu = 1; iommu = CONFIG_IOMMU;
if (get_option(&iommu, "iommu") != CB_SUCCESS) get_option(&iommu, "iommu");
iommu = CONFIG_IOMMU;
if (iommu) { if (iommu) {
/* Add a GART aperture resource */ /* Add a GART aperture resource */

6
src/southbridge/amd/sb600/sata.c
View File

@ -119,10 +119,8 @@ static void sata_init(struct device *dev)
pci_write_config8(dev, 0x40, byte); pci_write_config8(dev, 0x40, byte);
// 1 means IDE, 0 means AHCI // 1 means IDE, 0 means AHCI
if (get_option(&i, "sata_mode") != CB_SUCCESS) { i = CONFIG_SATA_MODE;
// no cmos option get_option(&i, "sata_mode");
i = CONFIG_SATA_MODE;
}
printk(BIOS_INFO, "%s: setting sata mode = %s\n", __func__, (i == SATA_MODE_IDE)?"ide":"ahci" ); printk(BIOS_INFO, "%s: setting sata mode = %s\n", __func__, (i == SATA_MODE_IDE)?"ide":"ahci" );
dword = pci_read_config32(dev, 0x8); dword = pci_read_config32(dev, 0x8);

4
src/southbridge/intel/i82801dx/lpc.c
View File

@ -116,8 +116,8 @@ static void i82801dx_power_options(device_t dev)
* *
* If the option is not existent (Laptops), use MAINBOARD_POWER_ON. * If the option is not existent (Laptops), use MAINBOARD_POWER_ON.
*/ */
if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = MAINBOARD_POWER_ON;
pwr_on = MAINBOARD_POWER_ON; get_option(&pwr_on, "power_on_after_fail");
reg8 = pci_read_config8(dev, GEN_PMCON_3); reg8 = pci_read_config8(dev, GEN_PMCON_3);
reg8 &= 0xfe; reg8 &= 0xfe;

4
src/southbridge/intel/i82801gx/lpc.c
View File

@ -179,8 +179,8 @@ static void i82801gx_power_options(device_t dev)
* *
* If the option is not existent (Laptops), use MAINBOARD_POWER_ON. * If the option is not existent (Laptops), use MAINBOARD_POWER_ON.
*/ */
if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = MAINBOARD_POWER_ON;
pwr_on = MAINBOARD_POWER_ON; get_option(&pwr_on, "power_on_after_fail");
reg8 = pci_read_config8(dev, GEN_PMCON_3); reg8 = pci_read_config8(dev, GEN_PMCON_3);
reg8 &= 0xfe; reg8 &= 0xfe;

4
src/southbridge/intel/i82801ix/lpc.c
View File

@ -186,8 +186,8 @@ static void i82801ix_power_options(device_t dev)
* *
* If the option is not existent (Laptops), use MAINBOARD_POWER_ON. * If the option is not existent (Laptops), use MAINBOARD_POWER_ON.
*/ */
if (get_option(&pwr_on, "power_on_after_fail") != CB_SUCCESS) pwr_on = MAINBOARD_POWER_ON;
pwr_on = MAINBOARD_POWER_ON; get_option(&pwr_on, "power_on_after_fail");
reg8 = pci_read_config8(dev, D31F0_GEN_PMCON_3); reg8 = pci_read_config8(dev, D31F0_GEN_PMCON_3);
reg8 &= 0xfe; reg8 &= 0xfe;