fix HPET on some ICH southbridges
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5252 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
parent
50776fab1c
commit
0719047005
|
@ -272,28 +272,6 @@ static void i82801ax_lpc_decode_en(device_t dev, uint16_t ich_model)
|
|||
}
|
||||
}
|
||||
|
||||
static void enable_hpet(struct device *dev)
|
||||
{
|
||||
#ifdef HPET_PRESENT
|
||||
uint32_t reg32;
|
||||
uint32_t code = (0 & 0x3);
|
||||
|
||||
reg32 = pci_read_config32(dev, GEN_CNTL);
|
||||
reg32 |= (1 << 17); /* Enable HPET. */
|
||||
/*
|
||||
* Bits [16:15] Memory Address Range
|
||||
* 00 FED0_0000h - FED0_03FFh
|
||||
* 01 FED0_1000h - FED0_13FFh
|
||||
* 10 FED0_2000h - FED0_23FFh
|
||||
* 11 FED0_3000h - FED0_33FFh
|
||||
*/
|
||||
reg32 &= ~(3 << 15); /* Clear it */
|
||||
reg32 |= (code << 15);
|
||||
/* TODO: reg32 is never written to anywhere? */
|
||||
printk_debug("Enabling HPET @0x%x\n", HPET_ADDR | (code << 12));
|
||||
#endif
|
||||
}
|
||||
|
||||
static void lpc_init(struct device *dev)
|
||||
{
|
||||
uint16_t ich_model = pci_read_config16(dev, PCI_DEVICE_ID);
|
||||
|
@ -326,9 +304,6 @@ static void lpc_init(struct device *dev)
|
|||
|
||||
/* Setup decode ports and LPC I/F enables. */
|
||||
i82801ax_lpc_decode_en(dev, ich_model);
|
||||
|
||||
/* Initialize the High Precision Event Timers, if present. */
|
||||
enable_hpet(dev);
|
||||
}
|
||||
|
||||
static void i82801ax_lpc_read_resources(device_t dev)
|
||||
|
|
|
@ -272,28 +272,6 @@ static void i82801bx_lpc_decode_en(device_t dev, uint16_t ich_model)
|
|||
}
|
||||
}
|
||||
|
||||
static void enable_hpet(struct device *dev)
|
||||
{
|
||||
#ifdef HPET_PRESENT
|
||||
uint32_t reg32;
|
||||
uint32_t code = (0 & 0x3);
|
||||
|
||||
reg32 = pci_read_config32(dev, GEN_CNTL);
|
||||
reg32 |= (1 << 17); /* Enable HPET. */
|
||||
/*
|
||||
* Bits [16:15] Memory Address Range
|
||||
* 00 FED0_0000h - FED0_03FFh
|
||||
* 01 FED0_1000h - FED0_13FFh
|
||||
* 10 FED0_2000h - FED0_23FFh
|
||||
* 11 FED0_3000h - FED0_33FFh
|
||||
*/
|
||||
reg32 &= ~(3 << 15); /* Clear it */
|
||||
reg32 |= (code << 15);
|
||||
/* TODO: reg32 is never written to anywhere? */
|
||||
printk_debug("Enabling HPET @0x%x\n", HPET_ADDR | (code << 12));
|
||||
#endif
|
||||
}
|
||||
|
||||
static void lpc_init(struct device *dev)
|
||||
{
|
||||
uint16_t ich_model = pci_read_config16(dev, PCI_DEVICE_ID);
|
||||
|
@ -326,9 +304,6 @@ static void lpc_init(struct device *dev)
|
|||
|
||||
/* Setup decode ports and LPC I/F enables. */
|
||||
i82801bx_lpc_decode_en(dev, ich_model);
|
||||
|
||||
/* Initialize the High Precision Event Timers, if present. */
|
||||
enable_hpet(dev);
|
||||
}
|
||||
|
||||
static void i82801bx_lpc_read_resources(device_t dev)
|
||||
|
|
|
@ -177,27 +177,6 @@ static void i82801dx_lpc_decode_en(device_t dev)
|
|||
pci_write_config16(dev, LPC_EN, 0x300F);
|
||||
}
|
||||
|
||||
static void enable_hpet(struct device *dev)
|
||||
{
|
||||
u32 reg32;
|
||||
u32 code = (0 & 0x3);
|
||||
|
||||
reg32 = pci_read_config32(dev, GEN_CNTL);
|
||||
reg32 |= (1 << 17); /* Enable HPET. */
|
||||
/*
|
||||
* Bits [16:15] Memory Address Range
|
||||
* 00 FED0_0000h - FED0_03FFh
|
||||
* 01 FED0_1000h - FED0_13FFh
|
||||
* 10 FED0_2000h - FED0_23FFh
|
||||
* 11 FED0_3000h - FED0_33FFh
|
||||
*/
|
||||
reg32 &= ~(3 << 15); /* Clear it */
|
||||
reg32 |= (code << 15);
|
||||
pci_write_config32(dev, GEN_CNTL, reg32);
|
||||
|
||||
printk_debug("Enabling HPET @0x%x\n", HPET_ADDR | (code << 12));
|
||||
}
|
||||
|
||||
static void lpc_init(struct device *dev)
|
||||
{
|
||||
/* Set the value for PCI command register. */
|
||||
|
@ -228,9 +207,6 @@ static void lpc_init(struct device *dev)
|
|||
|
||||
/* Setup decode ports and LPC I/F enables. */
|
||||
i82801dx_lpc_decode_en(dev);
|
||||
|
||||
/* Initialize the High Precision Event Timers */
|
||||
enable_hpet(dev);
|
||||
}
|
||||
|
||||
static void i82801dx_lpc_read_resources(device_t dev)
|
||||
|
|
|
@ -231,6 +231,7 @@ static void enable_hpet(struct device *dev)
|
|||
|
||||
dword &= ~(3 << 15); /* clear it */
|
||||
dword |= (code<<15);
|
||||
pci_write_config32(dev, GEN_CNTL, dword);
|
||||
|
||||
printk_debug("enabling HPET @0x%lx\n", hpet_address | (code <<12) );
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue