sb/intel/common: Make linking rtc.c conditional

Change-Id: I7321da453c0d9bb4a142c3c93103d8dc0ff416b7
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33201
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Arthur Heymans 2019-06-04 14:05:53 +02:00 committed by Nico Huber
parent 1c54bc4849
commit 074730c14c
12 changed files with 15 additions and 1 deletions

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@ -15,6 +15,7 @@ config CPU_SPECIFIC_OPTIONS
select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_SPI
select SOUTHBRIDGE_INTEL_COMMON_RESET select SOUTHBRIDGE_INTEL_COMMON_RESET
select SOUTHBRIDGE_INTEL_COMMON_RTC
select PARALLEL_MP select PARALLEL_MP
select SMP select SMP
select IOAPIC select IOAPIC

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@ -31,6 +31,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_COMMON_SPI select SOUTHBRIDGE_INTEL_COMMON_SPI
select SOUTHBRIDGE_INTEL_COMMON_PMCLIB select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
select SOUTHBRIDGE_INTEL_COMMON_PMBASE select SOUTHBRIDGE_INTEL_COMMON_PMBASE
select SOUTHBRIDGE_INTEL_COMMON_RTC
select IOAPIC select IOAPIC
select HAVE_USBDEBUG_OPTIONS select HAVE_USBDEBUG_OPTIONS
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER

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@ -6,6 +6,10 @@ config SOUTHBRIDGE_INTEL_COMMON_RESET
bool bool
select HAVE_CF9_RESET select HAVE_CF9_RESET
config SOUTHBRIDGE_INTEL_COMMON_RTC
def_bool n
depends on SOUTHBRIDGE_INTEL_COMMON
config SOUTHBRIDGE_INTEL_COMMON_PMCLIB config SOUTHBRIDGE_INTEL_COMMON_PMCLIB
def_bool n def_bool n
depends on SOUTHBRIDGE_INTEL_COMMON depends on SOUTHBRIDGE_INTEL_COMMON

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@ -53,6 +53,6 @@ ramstage-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT) += madt.c
smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c smm-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE) += finalize.c
all-y += rtc.c all-$(CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC) += rtc.c
endif endif

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@ -33,6 +33,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
select SOUTHBRIDGE_INTEL_COMMON_PMBASE select SOUTHBRIDGE_INTEL_COMMON_PMBASE
select SOUTHBRIDGE_INTEL_COMMON_RTC
config EHCI_BAR config EHCI_BAR
hex hex

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@ -2,6 +2,7 @@ config SOUTHBRIDGE_INTEL_I82371EB
select ACPI_INTEL_HARDWARE_SLEEP_VALUES select ACPI_INTEL_HARDWARE_SLEEP_VALUES
select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_RTC
bool bool
config BOOTBLOCK_SOUTHBRIDGE_INIT config BOOTBLOCK_SOUTHBRIDGE_INIT

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@ -22,6 +22,7 @@ config SOUTHBRIDGE_INTEL_I82801DX
select HAVE_USBDEBUG select HAVE_USBDEBUG
select SOUTHBRIDGE_INTEL_COMMON select SOUTHBRIDGE_INTEL_COMMON
select SOUTHBRIDGE_INTEL_COMMON_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_RTC
select HAVE_POWER_STATE_AFTER_FAILURE select HAVE_POWER_STATE_AFTER_FAILURE
select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE

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@ -32,6 +32,7 @@ config SOUTHBRIDGE_INTEL_I82801GX
select INTEL_HAS_TOP_SWAP select INTEL_HAS_TOP_SWAP
select SOUTHBRIDGE_INTEL_COMMON_SMM select SOUTHBRIDGE_INTEL_COMMON_SMM
select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
select SOUTHBRIDGE_INTEL_COMMON_RTC
if SOUTHBRIDGE_INTEL_I82801GX if SOUTHBRIDGE_INTEL_I82801GX

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@ -21,6 +21,7 @@ config SOUTHBRIDGE_INTEL_I82801IX
select SOUTHBRIDGE_INTEL_COMMON_SPI if !BOARD_EMULATION_QEMU_X86_Q35 select SOUTHBRIDGE_INTEL_COMMON_SPI if !BOARD_EMULATION_QEMU_X86_Q35
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
select SOUTHBRIDGE_INTEL_COMMON_PMBASE select SOUTHBRIDGE_INTEL_COMMON_PMBASE
select SOUTHBRIDGE_INTEL_COMMON_RTC
select IOAPIC select IOAPIC
select HAVE_USBDEBUG select HAVE_USBDEBUG
select USE_WATCHDOG_ON_BOOT select USE_WATCHDOG_ON_BOOT

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@ -22,6 +22,7 @@ config SOUTHBRIDGE_INTEL_I82801JX
select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
select SOUTHBRIDGE_INTEL_COMMON_PMCLIB select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
select SOUTHBRIDGE_INTEL_COMMON_PMBASE select SOUTHBRIDGE_INTEL_COMMON_PMBASE
select SOUTHBRIDGE_INTEL_COMMON_RTC
select IOAPIC select IOAPIC
select HAVE_USBDEBUG select HAVE_USBDEBUG
select USE_WATCHDOG_ON_BOOT select USE_WATCHDOG_ON_BOOT

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@ -35,6 +35,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_COMMON_SMM select SOUTHBRIDGE_INTEL_COMMON_SMM
select SOUTHBRIDGE_INTEL_COMMON_PMCLIB select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
select SOUTHBRIDGE_INTEL_COMMON_PMBASE select SOUTHBRIDGE_INTEL_COMMON_PMBASE
select SOUTHBRIDGE_INTEL_COMMON_RTC
select HAVE_USBDEBUG_OPTIONS select HAVE_USBDEBUG_OPTIONS
select COMMON_FADT select COMMON_FADT
select ACPI_SATA_GENERATOR select ACPI_SATA_GENERATOR

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@ -28,6 +28,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy
select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select SOUTHBRIDGE_INTEL_COMMON_FINALIZE
select SOUTHBRIDGE_INTEL_COMMON_PMCLIB select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
select SOUTHBRIDGE_INTEL_COMMON_PMBASE select SOUTHBRIDGE_INTEL_COMMON_PMBASE
select SOUTHBRIDGE_INTEL_COMMON_RTC
select IOAPIC select IOAPIC
select HAVE_SMI_HANDLER select HAVE_SMI_HANDLER
select HAVE_USBDEBUG_OPTIONS select HAVE_USBDEBUG_OPTIONS