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intel/fsp: Add and use new post codes for FSP phase indication 

New post codes are 
POST_FSP_MEMORY_EXIT
POST_FSP_SILICON_EXIT

This patch will make it more consistent to debug FSP hang
and reset issues.

Bug=none
Branch=none
TEST=Build and Boot on eve

Change-Id: I93004a09c2a3a97ac9458a0f686ab42415af19fb
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/20541
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
Subrata Banik 2017-07-12 15:31:06 +05:30 committed by Martin Roth
parent 0beac81f64
commit 0755ab98a5
3 changed files with 16 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/drivers/intel/fsp2_0/memory_init.c
View File

@ -361,7 +361,7 @@ static void do_fsp_memory_init(struct fsp_header *hdr, bool s3wake,
post_code(POST_FSP_MEMORY_INIT); post_code(POST_FSP_MEMORY_INIT);
timestamp_add_now(TS_FSP_MEMORY_INIT_START); timestamp_add_now(TS_FSP_MEMORY_INIT_START);
status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr()); status = fsp_raminit(&fspm_upd, fsp_get_hob_list_ptr());
post_code(POST_FSP_MEMORY_INIT); post_code(POST_FSP_MEMORY_EXIT);
timestamp_add_now(TS_FSP_MEMORY_INIT_END); timestamp_add_now(TS_FSP_MEMORY_INIT_END);
fsp_debug_after_memory_init(status); fsp_debug_after_memory_init(status);

2
src/drivers/intel/fsp2_0/silicon_init.c
View File

@ -49,7 +49,7 @@ static void do_silicon_init(struct fsp_header *hdr)
post_code(POST_FSP_SILICON_INIT); post_code(POST_FSP_SILICON_INIT);
status = silicon_init(&upd); status = silicon_init(&upd);
timestamp_add_now(TS_FSP_SILICON_INIT_END); timestamp_add_now(TS_FSP_SILICON_INIT_END);
post_code(POST_FSP_SILICON_INIT); post_code(POST_FSP_SILICON_EXIT);
fsp_debug_after_silicon_init(status); fsp_debug_after_silicon_init(status);

14
src/include/console/post_codes.h
View File

@ -272,6 +272,20 @@
*/ */
#define POST_OS_ENTER_WAKE 0x97 #define POST_OS_ENTER_WAKE 0x97
/**
* \brief After calling FSP MemoryInit
*
* FSP binary returned from MemoryInit phase
*/
#define POST_FSP_MEMORY_EXIT 0x98
/**
* \brief After calling FSP SiliconInit
*
* FSP binary returned from SiliconInit phase
*/
#define POST_FSP_SILICON_EXIT 0x99
/** /**
* \brief Entry into elf boot * \brief Entry into elf boot
* *