From 0767f89be48475a84339a71059f472a4d31e1d4d Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Wed, 2 Aug 2017 19:06:05 -0700 Subject: [PATCH] mainboard/google/soraka: Configure GPP_B8 in bootblock GPP_B8 acts as input to the inverter whose output controls PERST# signal to wifi module. Out of reset, GPP_B8 is configured as input by default. Since there is no external pull-down on it, this line is floating and results in PERST# being asserted until ramstage where the GPIO was originally configured. Because of this the wifi chip is not ready during the PCIe initialization step. Move the configuration of GPP_B8 to bootblock so that wifi device is taken out of reset as early as possible. BUG=b:64181150,b:62726961 TEST=Verified with warm reboot and suspend-resume stress test that wifi is still functional. Change-Id: I68e1bd67499262a17daade72e9a9fd32934a184d Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/20869 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Paul Menzel --- src/mainboard/google/poppy/variants/soraka/gpio.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/poppy/variants/soraka/gpio.c b/src/mainboard/google/poppy/variants/soraka/gpio.c index f0fb34afaf..6e0a54f24d 100644 --- a/src/mainboard/google/poppy/variants/soraka/gpio.c +++ b/src/mainboard/google/poppy/variants/soraka/gpio.c @@ -78,8 +78,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1), /* B7 : SRCCLKREQ2# ==> NC */ PAD_CFG_NC(GPP_B7), - /* B8 : SRCCLKREQ3# ==> WLAN_PE_RST */ - PAD_CFG_GPO(GPP_B8, 0, DEEP), /* B9 : SRCCLKREQ4# ==> NC */ PAD_CFG_NC(GPP_B9), /* B10 : SRCCLKREQ5# ==> NC */ @@ -371,6 +369,9 @@ static const struct pad_config gpio_table[] = { /* Early pad configuration in bootblock */ static const struct pad_config early_gpio_table[] = { + /* B8 : SRCCLKREQ3# ==> WLAN_PE_RST */ + PAD_CFG_GPO(GPP_B8, 0, DEEP), + #if IS_ENABLED(CONFIG_POPPY_USE_SPI_TPM) /* B15 : GSPI0_CS# ==> PCH_SPI_H1_3V3_CS_L */ PAD_CFG_NF(GPP_B15, NONE, DEEP, NF1),