diff --git a/src/mainboard/prodrive/atlas/Kconfig b/src/mainboard/prodrive/atlas/Kconfig index a779b3078e..914ce9fefb 100644 --- a/src/mainboard/prodrive/atlas/Kconfig +++ b/src/mainboard/prodrive/atlas/Kconfig @@ -9,9 +9,9 @@ config BOARD_PRODRIVE_ATLAS_BASEBOARD select MAINBOARD_HAS_TPM2 select MAINBOARD_USES_IFD_EC_REGION select MEMORY_MAPPED_TPM - select NO_S0IX_SUPPORT select PCIEXP_SUPPORT_RESIZABLE_BARS select SOC_INTEL_ALDERLAKE_PCH_P + select SOC_INTEL_ALDERLAKE_S3 if BOARD_PRODRIVE_ATLAS_BASEBOARD diff --git a/src/mainboard/starlabs/starbook/Kconfig b/src/mainboard/starlabs/starbook/Kconfig index b2dfe12971..3b55a86795 100644 --- a/src/mainboard/starlabs/starbook/Kconfig +++ b/src/mainboard/starlabs/starbook/Kconfig @@ -10,7 +10,6 @@ config BOARD_STARLABS_STARBOOK_SERIES select INTEL_GMA_HAVE_VBT select INTEL_LPSS_UART_FOR_CONSOLE select MAINBOARD_HAS_TPM2 - select NO_S0IX_SUPPORT select NO_UART_ON_SUPERIO select SOC_INTEL_COMMON_BLOCK_HDA_VERB select SYSTEM_TYPE_LAPTOP @@ -49,6 +48,7 @@ config BOARD_STARLABS_STARBOOK_TGL select SOC_INTEL_COMMON_BLOCK_TCSS select SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES select SOC_INTEL_TIGERLAKE + select SOC_INTEL_TIGERLAKE_S3 select SPI_FLASH_WINBOND select TPM_MEASURED_BOOT @@ -62,6 +62,7 @@ config BOARD_STARLABS_STARBOOK_ADL select MEMORY_MAPPED_TPM select SOC_INTEL_ALDERLAKE select SOC_INTEL_ALDERLAKE_PCH_P + select SOC_INTEL_ALDERLAKE_S3 select SPI_FLASH_WINBOND select TPM_MEASURED_BOOT select PCIEXP_SUPPORT_RESIZABLE_BARS diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb index c3a3f45546..cd8c48071a 100644 --- a/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb +++ b/src/mainboard/starlabs/starbook/variants/tgl/devicetree.cb @@ -19,6 +19,7 @@ chip soc/intel/tigerlake register "CnviBtAudioOffload" = "1" register "enable_c6dram" = "1" register "SaGv" = "SaGv_Enabled" + register "TcssD3ColdDisable" = "1" # FSP Silicon # Serial I/O diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 704f910a69..9b360e7b5a 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -648,7 +648,7 @@ static void fill_fsps_tcss_params(FSP_S_CONFIG *s_cfg, /* D3Hot and D3Cold for TCSS */ s_cfg->D3HotEnable = !config->tcss_d3_hot_disable; - s_cfg->D3ColdEnable = CONFIG(D3COLD_SUPPORT) && !config->tcss_d3_cold_disable; + s_cfg->D3ColdEnable = !CONFIG(SOC_INTEL_ALDERLAKE_S3) && !config->tcss_d3_cold_disable; s_cfg->UsbTcPortEn = 0; for (int i = 0; i < MAX_TYPE_C_PORTS; i++) { diff --git a/src/soc/intel/tigerlake/fsp_params.c b/src/soc/intel/tigerlake/fsp_params.c index a10db87202..b823f50301 100644 --- a/src/soc/intel/tigerlake/fsp_params.c +++ b/src/soc/intel/tigerlake/fsp_params.c @@ -323,12 +323,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) /* D3Hot and D3Cold for TCSS */ params->D3HotEnable = !config->TcssD3HotDisable; - cpu_id = cpu_get_cpuid(); if (cpu_id == CPUID_TIGERLAKE_A0) params->D3ColdEnable = 0; else - params->D3ColdEnable = CONFIG(D3COLD_SUPPORT); + params->D3ColdEnable = !config->TcssD3ColdDisable; params->UsbTcPortEn = config->UsbTcPortEn; params->TcssAuxOri = config->TcssAuxOri;