diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index bd0de4a6d4..1f5251144b 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -494,6 +494,18 @@ static void gma_pm_init_pre_vbios(struct device *dev) reg32 = gtt_read(0x6c024); reg32 &= ~0x000001c0; gtt_write(0x6c024, reg32); + + /* Initialize DP buffer translation with recommended defaults */ + gtt_write(0xe4f00, 0x0100030c); + gtt_write(0xe4f04, 0x00b8230c); + gtt_write(0xe4f08, 0x06f8930c); + gtt_write(0xe4f0c, 0x05f8e38e); + gtt_write(0xe4f10, 0x00b8030c); + gtt_write(0xe4f14, 0x0b78830c); + gtt_write(0xe4f18, 0x09f8d3cf); + gtt_write(0xe4f1c, 0x01e8030c); + gtt_write(0xe4f20, 0x09f863cf); + gtt_write(0xe4f24, 0x0ff803cf); } static void gma_pm_init_post_vbios(struct device *dev) diff --git a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c index 32becc1983..489dbc79ad 100644 --- a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c @@ -76,16 +76,6 @@ static void enable_port(u8 *mmio) write32(mmio + 0xf2060, 0x10); write32(mmio + 0x9840, 0x0); write32(mmio + 0x42000, 0xa0000000); - write32(mmio + 0xe4f00, 0x100030c); - write32(mmio + 0xe4f04, 0xb8230c); - write32(mmio + 0xe4f08, 0x6f8930c); - write32(mmio + 0xe4f0c, 0x5f8e38e); - write32(mmio + 0xe4f10, 0xb8030c); - write32(mmio + 0xe4f14, 0xb78830c); - write32(mmio + 0xe4f18, 0x9f8d3cf); - write32(mmio + 0xe4f1c, 0x1e8030c); - write32(mmio + 0xe4f20, 0x9f863cf); - write32(mmio + 0xe4f24, 0xff803cf); read32(mmio + 0xe4100); write32(mmio + 0xc4030, 0x10); write32(mmio + 0xe4110, 0x8004003e); @@ -115,16 +105,6 @@ static void enable_port(u8 *mmio) read32(mmio + 0xe1140); write32(mmio + 0xc4030, 0x10); read32(mmio + 0xc4000); - write32(mmio + 0xe4f00, 0x100030c); - write32(mmio + 0xe4f04, 0xb8230c); - write32(mmio + 0xe4f08, 0x6f8930c); - write32(mmio + 0xe4f0c, 0x5f8e38e); - write32(mmio + 0xe4f10, 0xb8030c); - write32(mmio + 0xe4f14, 0xb78830c); - write32(mmio + 0xe4f18, 0x9f8d3cf); - write32(mmio + 0xe4f1c, 0x1e8030c); - write32(mmio + 0xe4f20, 0x9f863cf); - write32(mmio + 0xe4f24, 0xff803cf); read32(mmio + 0xe4200); write32(mmio + 0xc4030, 0x1010); write32(mmio + 0xe4210, 0x8004003e); diff --git a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c index 756f7bf4f2..df1e8a8241 100644 --- a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c @@ -94,16 +94,6 @@ static void power_port(u8 *mmio) read32(mmio + 0x000e4210); // = 0x5144003e read32(mmio + 0x000e4210); // = 0x5144003e write32(mmio + 0x000e4210, 0x5344003e); - write32(mmio + 0x000e4f00, 0x0100030c); - write32(mmio + 0x000e4f04, 0x00b8230c); - write32(mmio + 0x000e4f08, 0x06f8930c); - write32(mmio + 0x000e4f0c, 0x09f8e38e); - write32(mmio + 0x000e4f10, 0x00b8030c); - write32(mmio + 0x000e4f14, 0x0b78830c); - write32(mmio + 0x000e4f18, 0x0ff8d3cf); - write32(mmio + 0x000e4f1c, 0x01e8030c); - write32(mmio + 0x000e4f20, 0x0ff863cf); - write32(mmio + 0x000e4f24, 0x0ff803cf); write32(mmio + 0x000c4030, 0x00001000); read32(mmio + 0x000c4000); // = 0x00000000 write32(mmio + 0x000c4030, 0x00001000);