remove SMBUS_MEM_DEVICE_[START|END] traces from code.
add 8mbit example config for amd solo. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -514,26 +514,6 @@ define IDE_OFFSET
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comment "Sector at which to start searching for boot image"
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end
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###############################################
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# SMBUS options
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###############################################
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define SMBUS_MEM_DEVICE_START
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default (0xa << 3)
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export always
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comment "Start address of SMBUS device"
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end
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define SMBUS_MEM_DEVICE_END
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default {SMBUS_MEM_DEVICE_START +1}
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export always
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comment "End address of SMBUS device"
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end
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define SMBUS_MEM_DEVICE_INC
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default 1
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export always
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comment "Increment value SMBUS"
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end
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###############################################
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# Misc options
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###############################################
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@ -1,3 +1,70 @@
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/*
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* This code is derived from the Opteron boards' debug.c.
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* It should go away either there or here, depending what fits better.
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*/
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static void dump_spd_registers(const struct mem_controller *ctrl)
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{
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int i;
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print_debug("\r\n");
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for(i = 0; i < 4; i++) {
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unsigned device;
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device = ctrl->channel0[i];
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if (device) {
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int j;
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print_debug("dimm: ");
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print_debug_hex8(i);
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print_debug(".0: ");
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print_debug_hex8(device);
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for(j = 0; j < 256; j++) {
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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print_debug("\r\n");
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print_debug_hex8(j);
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print_debug(": ");
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}
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status = spd_read_byte(device, j);
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if (status < 0) {
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print_debug("bad device\r\n");
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break;
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}
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byte = status & 0xff;
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print_debug_hex8(byte);
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print_debug_char(' ');
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}
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print_debug("\r\n");
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}
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device = ctrl->channel1[i];
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if (device) {
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int j;
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print_debug("dimm: ");
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print_debug_hex8(i);
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print_debug(".1: ");
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print_debug_hex8(device);
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for(j = 0; j < 256; j++) {
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int status;
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unsigned char byte;
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if ((j & 0xf) == 0) {
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print_debug("\r\n");
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print_debug_hex8(j);
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print_debug(": ");
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}
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status = spd_read_byte(device, j);
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if (status < 0) {
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print_debug("bad device\r\n");
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break;
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}
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byte = status & 0xff;
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print_debug_hex8(byte);
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print_debug_char(' ');
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}
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print_debug("\r\n");
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}
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}
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}
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#if 0
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void dump_spd_registers(void)
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{
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unsigned device;
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@ -23,3 +90,4 @@ void dump_spd_registers(void)
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printk_debug("\n");
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}
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}
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#endif
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@ -1 +1 @@
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solo
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solo*
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@ -0,0 +1,102 @@
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# This config file will build an image without normal/fallback mechanism
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# but with a kernel image builtin instead
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#
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# This has not been tested due to a bug in the SST49LF080A
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loadoptions
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target solo-8mbit
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uses ARCH
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uses CONFIG_COMPRESS
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uses CONFIG_IOAPIC
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uses CONFIG_ROM_STREAM
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uses CONFIG_ROM_STREAM_START
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uses CONFIG_UDELAY_TSC
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uses CPU_FIXUP
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uses FALLBACK_SIZE
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uses HAVE_FALLBACK_BOOT
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uses HAVE_MP_TABLE
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uses HAVE_PIRQ_TABLE
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uses HAVE_HARD_RESET
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uses i586
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uses i686
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uses INTEL_PPRO_MTRR
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uses HEAP_SIZE
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uses IRQ_SLOT_COUNT
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uses k7
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uses k8
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uses MAINBOARD_PART_NUMBER
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uses MAINBOARD_VENDOR
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uses CONFIG_SMP
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uses CONFIG_MAX_CPUS
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uses MEMORY_HOLE
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uses PAYLOAD_SIZE
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uses _RAMBASE
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uses _ROMBASE
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uses ROM_IMAGE_SIZE
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uses ROM_SECTION_OFFSET
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uses ROM_SECTION_SIZE
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uses ROM_SIZE
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uses STACK_SIZE
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uses USE_FALLBACK_IMAGE
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uses USE_OPTION_TABLE
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uses HAVE_OPTION_TABLE
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uses MAXIMUM_CONSOLE_LOGLEVEL
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uses DEFAULT_CONSOLE_LOGLEVEL
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uses CONFIG_CONSOLE_SERIAL8250
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uses MAINBOARD
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uses CONFIG_CHIP_CONFIGURE
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uses XIP_ROM_SIZE
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uses XIP_ROM_BASE
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uses LINUXBIOS_EXTRA_VERSION
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uses CC
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option CC="gcc -m32"
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option CONFIG_CHIP_CONFIGURE=1
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option MAXIMUM_CONSOLE_LOGLEVEL=8
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option DEFAULT_CONSOLE_LOGLEVEL=8
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option CONFIG_CONSOLE_SERIAL8250=1
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option CPU_FIXUP=1
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option CONFIG_UDELAY_TSC=0
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option i686=1
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option i586=1
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option INTEL_PPRO_MTRR=1
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option k7=1
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option k8=1
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option ROM_SIZE=0x100000
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option HAVE_OPTION_TABLE=1
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option CONFIG_ROM_STREAM=1
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option HAVE_FALLBACK_BOOT=1
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###
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### Compute the location and size of where this firmware image
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### (linuxBIOS plus bootloader) will live in the boot rom chip.
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###
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option FALLBACK_SIZE=ROM_SIZE
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## LinuxBIOS C code runs at this location in RAM
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option _RAMBASE=0x00004000
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#
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###
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### Compute the start location and size size of
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### The linuxBIOS bootloader.
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###
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romimage "single"
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option USE_FALLBACK_IMAGE=1
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option ROM_IMAGE_SIZE=0x10000
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option LINUXBIOS_EXTRA_VERSION=".0-8MBit"
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mainboard amd/solo
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payload /usr/share/LinuxBIOS/kernelpayload.elf
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end
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buildrom ./linuxbios.rom ROM_SIZE "single"
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