rename vt8237r_cfg() to k8x8xx_vt8237r_cfg() and make publicly accessible
Change-Id: I82d1ec5117a58aaa8cfd2a342b7172a2786f5680 Signed-off-by: Florian Zumbiehl <florz@florz.de> Reviewed-on: http://review.coreboot.org/379 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
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@ -29,7 +29,7 @@
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* PCI device 0:11.7, but it is mapped to PCI 0:0.7 (0x70-0x7c for PCI1)
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*/
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static void vt8237r_cfg(struct device *dev, struct device *devsb)
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void k8x8xx_vt8237r_cfg(struct device *dev, struct device *devsb)
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{
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u8 regm3;
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struct k8x8xx_vt8237_mirrored_regs mregs;
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@ -145,7 +145,7 @@ static void ctrl_init(struct device *dev)
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PCI_DEVICE_ID_VIA_VT8237R_LPC, 0);
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if (devsb) {
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vt8237r_vlink_init(dev);
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vt8237r_cfg(dev, devsb);
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k8x8xx_vt8237r_cfg(dev, devsb);
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} else {
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print_debug("VT8237R LPC not found !\n");
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return;
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@ -23,6 +23,9 @@
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#include <cpu/x86/msr.h>
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#include <cpu/amd/mtrr.h>
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#ifndef __PRE_RAM__
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#include <device/device.h>
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#endif
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#include "k8t890.h"
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struct k8x8xx_vt8237_mirrored_regs {
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@ -48,4 +51,8 @@ static inline void k8x8xx_vt8237_mirrored_regs_fill(struct k8x8xx_vt8237_mirrore
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regs->low_top_address = msr.lo >> 16;
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}
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#ifndef __PRE_RAM__
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void k8x8xx_vt8237r_cfg(struct device *, struct device *);
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#endif
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#endif /* SOUTHBRIDGE_VIA_K8T890_K8X8XX_H */
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