soc/intel/common/block/gpio: Fix PAD_DW1_MASK
for case CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y https://ticket.coreboot.org/issues/128 Signed-off-by: Hannah Williams <hannah.williams@intel.com> Change-Id: I2b0b9c07ebc99f4b4d7e8c5a72483bedd33e2e07 Reviewed-on: https://review.coreboot.org/21282 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Youness Alaoui <snifikino@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -36,9 +36,16 @@
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PAD_CFG0_TRIG_MASK | PAD_CFG0_RXRAW1_MASK | \
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PAD_CFG0_TRIG_MASK | PAD_CFG0_RXRAW1_MASK | \
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PAD_CFG0_RXPADSTSEL_MASK | PAD_CFG0_RESET_MASK)
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PAD_CFG0_RXPADSTSEL_MASK | PAD_CFG0_RESET_MASK)
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#if IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL)
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#define PAD_DW1_MASK (PAD_CFG1_IOSTERM_MASK | \
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PAD_CFG1_PULL_MASK | \
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PAD_CFG1_TOL_MASK | \
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PAD_CFG1_IOSSTATE_MASK)
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#else
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#define PAD_DW1_MASK (PAD_CFG1_IOSTERM_MASK | \
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#define PAD_DW1_MASK (PAD_CFG1_IOSTERM_MASK | \
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PAD_CFG1_PULL_MASK | \
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PAD_CFG1_PULL_MASK | \
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PAD_CFG1_IOSSTATE_MASK)
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PAD_CFG1_IOSSTATE_MASK)
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#endif
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#define PAD_DW2_MASK (0)
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#define PAD_DW2_MASK (0)
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#define PAD_DW3_MASK (0)
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#define PAD_DW3_MASK (0)
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